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| author | Evan Cheng <evan.cheng@apple.com> | 2007-09-26 06:25:56 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2007-09-26 06:25:56 +0000 |
| commit | 9efce638d307b2c71bd7f0258d47501661434c27 (patch) | |
| tree | ff8e23600c1a2e9ba48a6010a2ec8a84c84f785b /lib/Target/PowerPC/PPCRegisterInfo.cpp | |
| parent | 61001b8bd47adcf413dbb5b2a8c95cf22ec4bf7a (diff) | |
| download | external_llvm-9efce638d307b2c71bd7f0258d47501661434c27.zip external_llvm-9efce638d307b2c71bd7f0258d47501661434c27.tar.gz external_llvm-9efce638d307b2c71bd7f0258d47501661434c27.tar.bz2 | |
Allow copyRegToReg to emit cross register classes copies.
Tested with "make check"!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42346 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCRegisterInfo.cpp')
| -rw-r--r-- | lib/Target/PowerPC/PPCRegisterInfo.cpp | 20 |
1 files changed, 13 insertions, 7 deletions
diff --git a/lib/Target/PowerPC/PPCRegisterInfo.cpp b/lib/Target/PowerPC/PPCRegisterInfo.cpp index 2f1990e..158111b 100644 --- a/lib/Target/PowerPC/PPCRegisterInfo.cpp +++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp @@ -226,18 +226,24 @@ PPCRegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, void PPCRegisterInfo::copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, unsigned SrcReg, - const TargetRegisterClass *RC) const { - if (RC == PPC::GPRCRegisterClass) { + const TargetRegisterClass *DestRC, + const TargetRegisterClass *SrcRC) const { + if (DestRC != SrcRC) { + cerr << "Not yet supported!"; + abort(); + } + + if (DestRC == PPC::GPRCRegisterClass) { BuildMI(MBB, MI, TII.get(PPC::OR), DestReg).addReg(SrcReg).addReg(SrcReg); - } else if (RC == PPC::G8RCRegisterClass) { + } else if (DestRC == PPC::G8RCRegisterClass) { BuildMI(MBB, MI, TII.get(PPC::OR8), DestReg).addReg(SrcReg).addReg(SrcReg); - } else if (RC == PPC::F4RCRegisterClass) { + } else if (DestRC == PPC::F4RCRegisterClass) { BuildMI(MBB, MI, TII.get(PPC::FMRS), DestReg).addReg(SrcReg); - } else if (RC == PPC::F8RCRegisterClass) { + } else if (DestRC == PPC::F8RCRegisterClass) { BuildMI(MBB, MI, TII.get(PPC::FMRD), DestReg).addReg(SrcReg); - } else if (RC == PPC::CRRCRegisterClass) { + } else if (DestRC == PPC::CRRCRegisterClass) { BuildMI(MBB, MI, TII.get(PPC::MCRF), DestReg).addReg(SrcReg); - } else if (RC == PPC::VRRCRegisterClass) { + } else if (DestRC == PPC::VRRCRegisterClass) { BuildMI(MBB, MI, TII.get(PPC::VOR), DestReg).addReg(SrcReg).addReg(SrcReg); } else { cerr << "Attempt to copy register that is not GPR or FPR"; |