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authorAhmed Bougacha <ahmed.bougacha@gmail.com>2013-05-31 23:45:26 +0000
committerAhmed Bougacha <ahmed.bougacha@gmail.com>2013-05-31 23:45:26 +0000
commit23ed37a6b76e79272194fb46597f7280661b828f (patch)
treea2c447458a013a1f1bcbdc84d43fe3c55c416a0d /lib/Target/PowerPC/PPCRegisterInfo.td
parentcd8e3c4dcf4383b8b1c16827c6326f6e9bc49d51 (diff)
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Make SubRegIndex size mandatory, following r183020.
This also makes TableGen able to compute sizes/offsets of synthesized indices representing tuples. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183061 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCRegisterInfo.td')
-rw-r--r--lib/Target/PowerPC/PPCRegisterInfo.td10
1 files changed, 5 insertions, 5 deletions
diff --git a/lib/Target/PowerPC/PPCRegisterInfo.td b/lib/Target/PowerPC/PPCRegisterInfo.td
index 57a25f5..b1b4f06 100644
--- a/lib/Target/PowerPC/PPCRegisterInfo.td
+++ b/lib/Target/PowerPC/PPCRegisterInfo.td
@@ -11,11 +11,11 @@
//===----------------------------------------------------------------------===//
let Namespace = "PPC" in {
-def sub_lt : SubRegIndex;
-def sub_gt : SubRegIndex;
-def sub_eq : SubRegIndex;
-def sub_un : SubRegIndex;
-def sub_32 : SubRegIndex;
+def sub_lt : SubRegIndex<1>;
+def sub_gt : SubRegIndex<1, 1>;
+def sub_eq : SubRegIndex<1, 2>;
+def sub_un : SubRegIndex<1, 3>;
+def sub_32 : SubRegIndex<32>;
}