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| author | Dan Gohman <gohman@apple.com> | 2008-12-03 02:30:17 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2008-12-03 02:30:17 +0000 |
| commit | 41474baac839da410302950305722cb0e026a094 (patch) | |
| tree | d36d696d3d8328b7c3db385d50c50f0ef584359f /lib/Target/PowerPC | |
| parent | c70f3295438488e1e34eb212d1f8ec55bbf43935 (diff) | |
| download | external_llvm-41474baac839da410302950305722cb0e026a094.zip external_llvm-41474baac839da410302950305722cb0e026a094.tar.gz external_llvm-41474baac839da410302950305722cb0e026a094.tar.bz2 | |
Add a sanity-check to tablegen to catch the case where isSimpleLoad
is set but mayLoad is not set. Fix all the problems this turned up.
Change code to not use isSimpleLoad instead of mayLoad unless it
really wants isSimpleLoad.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60459 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC')
| -rw-r--r-- | lib/Target/PowerPC/PPCHazardRecognizers.cpp | 2 | ||||
| -rw-r--r-- | lib/Target/PowerPC/PPCInstr64Bit.td | 4 | ||||
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.td | 2 |
3 files changed, 7 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPCHazardRecognizers.cpp b/lib/Target/PowerPC/PPCHazardRecognizers.cpp index b9b7496..14745e6 100644 --- a/lib/Target/PowerPC/PPCHazardRecognizers.cpp +++ b/lib/Target/PowerPC/PPCHazardRecognizers.cpp @@ -72,7 +72,7 @@ PPCHazardRecognizer970::GetInstrType(unsigned Opcode, const TargetInstrDesc &TID = TII.get(Opcode); - isLoad = TID.isSimpleLoad(); + isLoad = TID.mayLoad(); isStore = TID.mayStore(); unsigned TSFlags = TID.TSFlags; diff --git a/lib/Target/PowerPC/PPCInstr64Bit.td b/lib/Target/PowerPC/PPCInstr64Bit.td index 6867cd7..a2f1834 100644 --- a/lib/Target/PowerPC/PPCInstr64Bit.td +++ b/lib/Target/PowerPC/PPCInstr64Bit.td @@ -487,6 +487,7 @@ def LWAX : XForm_1<31, 341, (outs G8RC:$rD), (ins memrr:$src), PPC970_DGroup_Cracked; // Update forms. +let mayLoad = 1 in def LHAU8 : DForm_1<43, (outs G8RC:$rD, ptr_rc:$ea_result), (ins symbolLo:$disp, ptr_rc:$rA), "lhau $rD, $disp($rA)", LdStGeneral, @@ -520,6 +521,7 @@ def LWZX8 : XForm_1<31, 23, (outs G8RC:$rD), (ins memrr:$src), // Update forms. +let mayLoad = 1 in { def LBZU8 : DForm_1<35, (outs G8RC:$rD, ptr_rc:$ea_result), (ins memri:$addr), "lbzu $rD, $addr", LdStGeneral, []>, RegConstraint<"$addr.reg = $ea_result">, @@ -533,6 +535,7 @@ def LWZU8 : DForm_1<33, (outs G8RC:$rD, ptr_rc:$ea_result), (ins memri:$addr), []>, RegConstraint<"$addr.reg = $ea_result">, NoEncode<"$ea_result">; } +} // Full 8-byte loads. @@ -544,6 +547,7 @@ def LDX : XForm_1<31, 21, (outs G8RC:$rD), (ins memrr:$src), "ldx $rD, $src", LdStLD, [(set G8RC:$rD, (load xaddr:$src))]>, isPPC64; +let mayLoad = 1 in def LDU : DSForm_1<58, 1, (outs G8RC:$rD, ptr_rc:$ea_result), (ins memrix:$addr), "ldu $rD, $addr", LdStLD, []>, RegConstraint<"$addr.reg = $ea_result">, isPPC64, diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index 0cb7c85..4106c45 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -683,6 +683,7 @@ def LFD : DForm_1<50, (outs F8RC:$rD), (ins memri:$src), // Unindexed (r+i) Loads with Update (preinc). +let mayLoad = 1 in { def LBZU : DForm_1<35, (outs GPRC:$rD, ptr_rc:$ea_result), (ins memri:$addr), "lbzu $rD, $addr", LdStGeneral, []>, RegConstraint<"$addr.reg = $ea_result">, @@ -713,6 +714,7 @@ def LFDU : DForm_1<51, (outs F8RC:$rD, ptr_rc:$ea_result), (ins memri:$addr), []>, RegConstraint<"$addr.reg = $ea_result">, NoEncode<"$ea_result">; } +} // Indexed (r+r) Loads. // |