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| author | Roman Divacky <rdivacky@freebsd.org> | 2012-04-02 15:49:30 +0000 |
|---|---|---|
| committer | Roman Divacky <rdivacky@freebsd.org> | 2012-04-02 15:49:30 +0000 |
| commit | 466958c2a04a74de99efd3d7e0d5bd81cdf1e1fe (patch) | |
| tree | 30afc32f93a4dee645656bd435c1312bcae02bd6 /lib/Target/PowerPC | |
| parent | 545b962f1565eaf9ba0f7dfa1b0a74c43359022d (diff) | |
| download | external_llvm-466958c2a04a74de99efd3d7e0d5bd81cdf1e1fe.zip external_llvm-466958c2a04a74de99efd3d7e0d5bd81cdf1e1fe.tar.gz external_llvm-466958c2a04a74de99efd3d7e0d5bd81cdf1e1fe.tar.bz2 | |
Implement the SVR4 byval alignment for aggregates. Fixing a FIXME.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153876 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC')
| -rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index 96b7074..746fc23 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -446,7 +446,16 @@ unsigned PPCTargetLowering::getByValTypeAlignment(Type *Ty) const { // Darwin passes everything on 4 byte boundary. if (TM.getSubtarget<PPCSubtarget>().isDarwin()) return 4; - // FIXME SVR4 TBD + + // 16byte and wider vectors are passed on 16byte boundary. + if (VectorType *VTy = dyn_cast<VectorType>(Ty)) + if (VTy->getBitWidth() >= 128) + return 16; + + // The rest is 8 on PPC64 and 4 on PPC32 boundary. + if (PPCSubTarget.isPPC64()) + return 8; + return 4; } |