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author | Duncan Sands <baldrick@free.fr> | 2008-07-19 16:26:02 +0000 |
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committer | Duncan Sands <baldrick@free.fr> | 2008-07-19 16:26:02 +0000 |
commit | a7360f0178327e1ef4b1789612dbded46a704156 (patch) | |
tree | 2e5b5879556dc90f5ee12cbde05a61eb7c93e073 /lib/Target/PowerPC | |
parent | e637727bed0dad86dac794b8b28b8905e11ac6cd (diff) | |
download | external_llvm-a7360f0178327e1ef4b1789612dbded46a704156.zip external_llvm-a7360f0178327e1ef4b1789612dbded46a704156.tar.gz external_llvm-a7360f0178327e1ef4b1789612dbded46a704156.tar.bz2 |
Make sure custom lowering for LegalizeTypes
returns a node with the right number of
return values. This fixes codegen of
Generic/cast-fp.ll, Generic/fp_to_int.ll
and PowerPC/multiple-return-values.ll
when using -march=ppc32 -mattr=+64bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53794 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC')
-rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index 2537502..ad16baa 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -2855,7 +2855,7 @@ SDOperand PPCTargetLowering::LowerFP_TO_SINT(SDOperand Op, SelectionDAG &DAG) { SDOperand Src = Op.getOperand(0); if (Src.getValueType() == MVT::f32) Src = DAG.getNode(ISD::FP_EXTEND, MVT::f64, Src); - + SDOperand Tmp; switch (Op.getValueType().getSimpleVT()) { default: assert(0 && "Unhandled FP_TO_SINT type in custom expander!"); @@ -2866,10 +2866,10 @@ SDOperand PPCTargetLowering::LowerFP_TO_SINT(SDOperand Op, SelectionDAG &DAG) { Tmp = DAG.getNode(PPCISD::FCTIDZ, MVT::f64, Src); break; } - + // Convert the FP value to an int value through memory. SDOperand FIPtr = DAG.CreateStackTemporary(MVT::f64); - + // Emit a store to the stack slot. SDOperand Chain = DAG.getStore(DAG.getEntryNode(), Tmp, FIPtr, NULL, 0); @@ -3907,7 +3907,13 @@ SDOperand PPCTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) { SDNode *PPCTargetLowering::ReplaceNodeResults(SDNode *N, SelectionDAG &DAG) { switch (N->getOpcode()) { default: assert(0 && "Wasn't expecting to be able to lower this!"); - case ISD::FP_TO_SINT: return LowerFP_TO_SINT(SDOperand(N, 0), DAG).Val; + case ISD::FP_TO_SINT: { + SDOperand Res = LowerFP_TO_SINT(SDOperand(N, 0), DAG); + // Use MERGE_VALUES to drop the chain result value and get a node with one + // result. This requires turning off getMergeValues simplification, since + // otherwise it will give us Res back. + return DAG.getMergeValues(&Res, 1, false).Val; + } } } |