diff options
author | Tom Stellard <thomas.stellard@amd.com> | 2013-06-07 20:37:48 +0000 |
---|---|---|
committer | Tom Stellard <thomas.stellard@amd.com> | 2013-06-07 20:37:48 +0000 |
commit | 3ff0abfaabc2c7f604d490be587b9c27e7c91ac0 (patch) | |
tree | 159b1d39952b6a6af115ed1ee8e4946200c89bbf /lib/Target/R600/AMDGPU.td | |
parent | c1dcb8d654d4468d63224269ee3c92480bf2385b (diff) | |
download | external_llvm-3ff0abfaabc2c7f604d490be587b9c27e7c91ac0.zip external_llvm-3ff0abfaabc2c7f604d490be587b9c27e7c91ac0.tar.gz external_llvm-3ff0abfaabc2c7f604d490be587b9c27e7c91ac0.tar.bz2 |
R600: Rework subtarget info and remove AMDILDevice classes
This should simplify the subtarget definitions and make it easier to
add new ones.
Reviewed-by: Vincent Lejeune <vljn@ovi.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183566 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/R600/AMDGPU.td')
-rw-r--r-- | lib/Target/R600/AMDGPU.td | 74 |
1 files changed, 36 insertions, 38 deletions
diff --git a/lib/Target/R600/AMDGPU.td b/lib/Target/R600/AMDGPU.td index 099a491..0048e25 100644 --- a/lib/Target/R600/AMDGPU.td +++ b/lib/Target/R600/AMDGPU.td @@ -14,56 +14,29 @@ include "AMDILBase.td" // Subtarget Features //===----------------------------------------------------------------------===// +// Debugging Features + +def FeatureDumpCode : SubtargetFeature <"DumpCode", + "DumpCode", + "true", + "Dump MachineInstrs in the CodeEmitter">; + +// Target features + def FeatureFP64 : SubtargetFeature<"fp64", - "CapsOverride[AMDGPUDeviceInfo::DoubleOps]", + "FP64", "true", "Enable 64bit double precision operations">; -def FeatureByteAddress : SubtargetFeature<"byte_addressable_store", - "CapsOverride[AMDGPUDeviceInfo::ByteStores]", - "true", - "Enable byte addressable stores">; -def FeatureBarrierDetect : SubtargetFeature<"barrier_detect", - "CapsOverride[AMDGPUDeviceInfo::BarrierDetect]", - "true", - "Enable duplicate barrier detection(HD5XXX or later).">; -def FeatureImages : SubtargetFeature<"images", - "CapsOverride[AMDGPUDeviceInfo::Images]", - "true", - "Enable image functions">; -def FeatureMultiUAV : SubtargetFeature<"multi_uav", - "CapsOverride[AMDGPUDeviceInfo::MultiUAV]", - "true", - "Generate multiple UAV code(HD5XXX family or later)">; -def FeatureMacroDB : SubtargetFeature<"macrodb", - "CapsOverride[AMDGPUDeviceInfo::MacroDB]", - "true", - "Use internal macrodb, instead of macrodb in driver">; -def FeatureNoAlias : SubtargetFeature<"noalias", - "CapsOverride[AMDGPUDeviceInfo::NoAlias]", - "true", - "assert that all kernel argument pointers are not aliased">; -def FeatureNoInline : SubtargetFeature<"no-inline", - "CapsOverride[AMDGPUDeviceInfo::NoInline]", - "true", - "specify whether to not inline functions">; def Feature64BitPtr : SubtargetFeature<"64BitPtr", "Is64bit", - "false", + "true", "Specify if 64bit addressing should be used.">; def Feature32on64BitPtr : SubtargetFeature<"64on32BitPtr", "Is32on64bit", "false", "Specify if 64bit sized pointers with 32bit addressing should be used.">; -def FeatureDebug : SubtargetFeature<"debug", - "CapsOverride[AMDGPUDeviceInfo::Debug]", - "true", - "Debug mode is enabled, so disable hardware accelerated address spaces.">; -def FeatureDumpCode : SubtargetFeature <"DumpCode", - "DumpCode", - "true", - "Dump MachineInstrs in the CodeEmitter">; def FeatureR600ALUInst : SubtargetFeature<"R600ALUInst", "R600ALUInst", @@ -75,6 +48,11 @@ def FeatureVertexCache : SubtargetFeature<"HasVertexCache", "true", "Specify use of dedicated vertex cache.">; +def FeatureCaymanISA : SubtargetFeature<"caymanISA", + "CaymanISA", + "true", + "Use Cayman ISA">; + class SubtargetFeatureFetchLimit <string Value> : SubtargetFeature <"fetch"#Value, "TexVTXClauseSize", @@ -84,6 +62,26 @@ class SubtargetFeatureFetchLimit <string Value> : def FeatureFetchLimit8 : SubtargetFeatureFetchLimit <"8">; def FeatureFetchLimit16 : SubtargetFeatureFetchLimit <"16">; +class SubtargetFeatureGeneration <string Value, + list<SubtargetFeature> Implies> : + SubtargetFeature <Value, "Gen", "AMDGPUSubtarget::"#Value, + Value#" GPU generation", Implies>; + +def FeatureR600 : SubtargetFeatureGeneration<"R600", + [FeatureR600ALUInst, FeatureFetchLimit8]>; + +def FeatureR700 : SubtargetFeatureGeneration<"R700", + [FeatureFetchLimit16]>; + +def FeatureEvergreen : SubtargetFeatureGeneration<"EVERGREEN", + [FeatureFetchLimit16]>; + +def FeatureNorthernIslands : SubtargetFeatureGeneration<"NORTHERN_ISLANDS", + [FeatureFetchLimit16]>; + +def FeatureSouthernIslands : SubtargetFeatureGeneration<"SOUTHERN_ISLANDS", + [Feature64BitPtr, FeatureFP64]>; + //===----------------------------------------------------------------------===// def AMDGPUInstrInfo : InstrInfo { |