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| author | Vincent Lejeune <vljn@ovi.com> | 2013-05-17 16:50:32 +0000 |
|---|---|---|
| committer | Vincent Lejeune <vljn@ovi.com> | 2013-05-17 16:50:32 +0000 |
| commit | 4ed9917147b1d1f2616f7c941bbe6999b979f510 (patch) | |
| tree | 221d8b6de51be786194d310e6f95c5fdfa232624 /lib/Target/R600/AMDGPUISelLowering.h | |
| parent | d3293b49f9c7af741d2edd3062499fb50db0e89b (diff) | |
| download | external_llvm-4ed9917147b1d1f2616f7c941bbe6999b979f510.zip external_llvm-4ed9917147b1d1f2616f7c941bbe6999b979f510.tar.gz external_llvm-4ed9917147b1d1f2616f7c941bbe6999b979f510.tar.bz2 | |
R600: Relax some vector constraints on Dot4.
Dot4 now uses 8 scalar operands instead of 2 vectors one which allows register
coalescer to remove some unneeded COPY.
This patch also defines some structures/functions that can be used to handle
every vector instructions (CUBE, Cayman special instructions...) in a similar
fashion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182126 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/R600/AMDGPUISelLowering.h')
| -rw-r--r-- | lib/Target/R600/AMDGPUISelLowering.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/R600/AMDGPUISelLowering.h b/lib/Target/R600/AMDGPUISelLowering.h index f108fbc..4c25886 100644 --- a/lib/Target/R600/AMDGPUISelLowering.h +++ b/lib/Target/R600/AMDGPUISelLowering.h @@ -126,6 +126,7 @@ enum { SMIN, UMIN, URECIP, + DOT4, TEXTURE_FETCH, EXPORT, CONST_ADDRESS, |