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| author | Tom Stellard <thomas.stellard@amd.com> | 2013-05-10 02:09:45 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2013-05-10 02:09:45 +0000 |
| commit | 58e87a68a8593b0ae133d0bac17ae2027519a204 (patch) | |
| tree | 9b852d326d1b749cda0a0f57c6e53a2934dbf4f6 /lib/Target/R600/AMDGPUInstructions.td | |
| parent | dde683645672b5832ec189cd27123857183e70bb (diff) | |
| download | external_llvm-58e87a68a8593b0ae133d0bac17ae2027519a204.zip external_llvm-58e87a68a8593b0ae133d0bac17ae2027519a204.tar.gz external_llvm-58e87a68a8593b0ae133d0bac17ae2027519a204.tar.bz2 | |
R600: Remove AMDILPeeopholeOptimizer and replace optimizations with tablegen patterns
The BFE optimization was the only one we were actually using, and it was
emitting an intrinsic that we don't support.
https://bugs.freedesktop.org/show_bug.cgi?id=64201
Reviewed-by: Christian König <christian.koenig@amd.com>
NOTE: This is a candidate for the 3.3 branch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181580 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/R600/AMDGPUInstructions.td')
| -rw-r--r-- | lib/Target/R600/AMDGPUInstructions.td | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/lib/Target/R600/AMDGPUInstructions.td b/lib/Target/R600/AMDGPUInstructions.td index b44d248..d2620b2 100644 --- a/lib/Target/R600/AMDGPUInstructions.td +++ b/lib/Target/R600/AMDGPUInstructions.td @@ -284,6 +284,17 @@ class SHA256MaPattern <Instruction BFI_INT, Instruction XOR> : Pat < (BFI_INT (XOR i32:$x, i32:$y), i32:$z, i32:$y) >; +// Bitfield extract patterns + +def legalshift32 : ImmLeaf <i32, [{return Imm >=0 && Imm < 32;}]>; +def bfemask : PatLeaf <(imm), [{return isMask_32(N->getZExtValue());}], + SDNodeXForm<imm, [{ return CurDAG->getTargetConstant(CountTrailingOnes_32(N->getZExtValue()), MVT::i32);}]>>; + +class BFEPattern <Instruction BFE> : Pat < + (and (srl i32:$x, legalshift32:$y), bfemask:$z), + (BFE $x, $y, $z) +>; + include "R600Instructions.td" include "SIInstrInfo.td" |