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| author | Vincent Lejeune <vljn@ovi.com> | 2013-03-11 18:15:06 +0000 |
|---|---|---|
| committer | Vincent Lejeune <vljn@ovi.com> | 2013-03-11 18:15:06 +0000 |
| commit | fd49dac48fee6da580157515dec55ed2f2d8f2b3 (patch) | |
| tree | 030963635ae7ac19395ba6f74069aac16d052d82 /lib/Target/R600/AMDILCFGStructurizer.cpp | |
| parent | 48f8015121b0136ec6e1b4d0c3fe553537cf25c8 (diff) | |
| download | external_llvm-fd49dac48fee6da580157515dec55ed2f2d8f2b3.zip external_llvm-fd49dac48fee6da580157515dec55ed2f2d8f2b3.tar.gz external_llvm-fd49dac48fee6da580157515dec55ed2f2d8f2b3.tar.bz2 | |
R600: Fix JUMP handling so that MachineInstr verification can occur
This allows R600 Target to use the newly created -verify-misched llc flag
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176819 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/R600/AMDILCFGStructurizer.cpp')
| -rw-r--r-- | lib/Target/R600/AMDILCFGStructurizer.cpp | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/lib/Target/R600/AMDILCFGStructurizer.cpp b/lib/Target/R600/AMDILCFGStructurizer.cpp index aa8ab6b..b0cd0f9 100644 --- a/lib/Target/R600/AMDILCFGStructurizer.cpp +++ b/lib/Target/R600/AMDILCFGStructurizer.cpp @@ -2595,6 +2595,7 @@ struct CFGStructTraits<AMDGPUCFGStructurizer> { static int getBranchNzeroOpcode(int oldOpcode) { switch(oldOpcode) { + case AMDGPU::JUMP_COND: case AMDGPU::JUMP: return AMDGPU::IF_PREDICATE_SET; case AMDGPU::BRANCH_COND_i32: case AMDGPU::BRANCH_COND_f32: return AMDGPU::IF_LOGICALNZ_f32; @@ -2606,6 +2607,7 @@ struct CFGStructTraits<AMDGPUCFGStructurizer> { static int getBranchZeroOpcode(int oldOpcode) { switch(oldOpcode) { + case AMDGPU::JUMP_COND: case AMDGPU::JUMP: return AMDGPU::IF_PREDICATE_SET; case AMDGPU::BRANCH_COND_i32: case AMDGPU::BRANCH_COND_f32: return AMDGPU::IF_LOGICALZ_f32; @@ -2617,6 +2619,7 @@ struct CFGStructTraits<AMDGPUCFGStructurizer> { static int getContinueNzeroOpcode(int oldOpcode) { switch(oldOpcode) { + case AMDGPU::JUMP_COND: case AMDGPU::JUMP: return AMDGPU::CONTINUE_LOGICALNZ_i32; default: assert(0 && "internal error"); @@ -2626,6 +2629,7 @@ struct CFGStructTraits<AMDGPUCFGStructurizer> { static int getContinueZeroOpcode(int oldOpcode) { switch(oldOpcode) { + case AMDGPU::JUMP_COND: case AMDGPU::JUMP: return AMDGPU::CONTINUE_LOGICALZ_i32; default: assert(0 && "internal error"); @@ -2654,8 +2658,7 @@ struct CFGStructTraits<AMDGPUCFGStructurizer> { static bool isCondBranch(MachineInstr *instr) { switch (instr->getOpcode()) { - case AMDGPU::JUMP: - return instr->getOperand(instr->findFirstPredOperandIdx()).getReg() != 0; + case AMDGPU::JUMP_COND: case AMDGPU::BRANCH_COND_i32: case AMDGPU::BRANCH_COND_f32: break; @@ -2668,7 +2671,6 @@ struct CFGStructTraits<AMDGPUCFGStructurizer> { static bool isUncondBranch(MachineInstr *instr) { switch (instr->getOpcode()) { case AMDGPU::JUMP: - return instr->getOperand(instr->findFirstPredOperandIdx()).getReg() == 0; case AMDGPU::BRANCH: return true; default: |