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| author | Tom Stellard <thomas.stellard@amd.com> | 2012-12-19 22:10:31 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2012-12-19 22:10:31 +0000 |
| commit | 6b7d99d47321ebb478b22afd2e317fe89d2149db (patch) | |
| tree | 548126753462b8985bf846b022d39b2c51e96f96 /lib/Target/R600/CMakeLists.txt | |
| parent | 6eebe47060eec7e3a4ae95d4b4835869108f9c07 (diff) | |
| download | external_llvm-6b7d99d47321ebb478b22afd2e317fe89d2149db.zip external_llvm-6b7d99d47321ebb478b22afd2e317fe89d2149db.tar.gz external_llvm-6b7d99d47321ebb478b22afd2e317fe89d2149db.tar.bz2 | |
R600: New control flow for SI v2
This patch replaces the control flow handling with a new
pass which structurize the graph before transforming it to
machine instruction. This has a couple of different advantages
and currently fixes 20 piglit tests without a single regression.
It is now a general purpose transformation that could be not
only be used for SI/R6xx, but also for other hardware
implementations that use a form of structurized control flow.
v2: further cleanup, fixes and documentation
Patch by: Christian König
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170591 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/R600/CMakeLists.txt')
| -rw-r--r-- | lib/Target/R600/CMakeLists.txt | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/Target/R600/CMakeLists.txt b/lib/Target/R600/CMakeLists.txt index 757b733..ce0b56b 100644 --- a/lib/Target/R600/CMakeLists.txt +++ b/lib/Target/R600/CMakeLists.txt @@ -27,6 +27,7 @@ add_llvm_target(R600CodeGen AMDGPUAsmPrinter.cpp AMDGPUMCInstLower.cpp AMDGPUSubtarget.cpp + AMDGPUStructurizeCFG.cpp AMDGPUTargetMachine.cpp AMDGPUISelLowering.cpp AMDGPUConvertToISA.cpp @@ -37,6 +38,7 @@ add_llvm_target(R600CodeGen R600ISelLowering.cpp R600MachineFunctionInfo.cpp R600RegisterInfo.cpp + SIAnnotateControlFlow.cpp SIAssignInterpRegs.cpp SIInstrInfo.cpp SIISelLowering.cpp @@ -44,7 +46,6 @@ add_llvm_target(R600CodeGen SILowerControlFlow.cpp SIMachineFunctionInfo.cpp SIRegisterInfo.cpp - SIFixSGPRLiveness.cpp ) add_dependencies(LLVMR600CodeGen intrinsics_gen) |