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authorVincent Lejeune <vljn@ovi.com>2013-10-01 19:32:58 +0000
committerVincent Lejeune <vljn@ovi.com>2013-10-01 19:32:58 +0000
commitdfef7cbfc6a96d129b99750f554c7dbc000d3228 (patch)
treeff3bd94d5ccb1187757284832161119cd2c94486 /lib/Target/R600/R600InstrInfo.h
parentc6c37d74a272f49f811fe747aa71f372600dfd9e (diff)
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R600: add a pass that merges clauses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191790 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/R600/R600InstrInfo.h')
-rw-r--r--lib/Target/R600/R600InstrInfo.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/lib/Target/R600/R600InstrInfo.h b/lib/Target/R600/R600InstrInfo.h
index 235a875..1a99f67 100644
--- a/lib/Target/R600/R600InstrInfo.h
+++ b/lib/Target/R600/R600InstrInfo.h
@@ -66,6 +66,10 @@ namespace llvm {
bool hasInstrModifiers(unsigned Opcode) const;
bool isLDSInstr(unsigned Opcode) const;
+ /// \returns true if this \p Opcode represents an ALU instruction or an
+ /// instruction that will be lowered in ExpandSpecialInstrs Pass.
+ bool canBeConsideredALU(const MachineInstr *MI) const;
+
bool isTransOnly(unsigned Opcode) const;
bool isTransOnly(const MachineInstr *MI) const;
bool isVectorOnly(unsigned Opcode) const;