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| author | Tom Stellard <thomas.stellard@amd.com> | 2013-05-20 15:02:01 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2013-05-20 15:02:01 +0000 |
| commit | 9bf4590aaa26ebb5afdbec079daeee8e0b268b47 (patch) | |
| tree | a3cb707e68b69fdf1840d28551c58d34d7f5ff12 /lib/Target/R600/SIISelLowering.cpp | |
| parent | 30a7a7c1fdbd2607345dd1554e3436749fd75c6e (diff) | |
| download | external_llvm-9bf4590aaa26ebb5afdbec079daeee8e0b268b47.zip external_llvm-9bf4590aaa26ebb5afdbec079daeee8e0b268b47.tar.gz external_llvm-9bf4590aaa26ebb5afdbec079daeee8e0b268b47.tar.bz2 | |
R600/SI: Make fitsRegClass() operands const
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182282 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/R600/SIISelLowering.cpp')
| -rw-r--r-- | lib/Target/R600/SIISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/R600/SIISelLowering.cpp b/lib/Target/R600/SIISelLowering.cpp index 237999f..a077a95 100644 --- a/lib/Target/R600/SIISelLowering.cpp +++ b/lib/Target/R600/SIISelLowering.cpp @@ -513,7 +513,7 @@ bool SITargetLowering::foldImm(SDValue &Operand, int32_t &Immediate, } /// \brief Does "Op" fit into register class "RegClass" ? -bool SITargetLowering::fitsRegClass(SelectionDAG &DAG, SDValue &Op, +bool SITargetLowering::fitsRegClass(SelectionDAG &DAG, const SDValue &Op, unsigned RegClass) const { MachineRegisterInfo &MRI = DAG.getMachineFunction().getRegInfo(); |