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| author | Tom Stellard <thomas.stellard@amd.com> | 2013-08-14 23:25:00 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2013-08-14 23:25:00 +0000 |
| commit | a41520cf9b9cefed2091a0624a34c5f7fdb42a68 (patch) | |
| tree | 7e1d76112142ccb5f800e86a444e7e2b0ecc9304 /lib/Target/R600/SIISelLowering.cpp | |
| parent | e8e33f448e8830590c498ac5101ef8b27446ca3b (diff) | |
| download | external_llvm-a41520cf9b9cefed2091a0624a34c5f7fdb42a68.zip external_llvm-a41520cf9b9cefed2091a0624a34c5f7fdb42a68.tar.gz external_llvm-a41520cf9b9cefed2091a0624a34c5f7fdb42a68.tar.bz2 | |
R600/SI: Improve legalization of vector operations
This should fix hangs in the OpenCL piglit tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188431 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/R600/SIISelLowering.cpp')
| -rw-r--r-- | lib/Target/R600/SIISelLowering.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/R600/SIISelLowering.cpp b/lib/Target/R600/SIISelLowering.cpp index 30a510d..0bd8bce 100644 --- a/lib/Target/R600/SIISelLowering.cpp +++ b/lib/Target/R600/SIISelLowering.cpp @@ -34,9 +34,6 @@ SITargetLowering::SITargetLowering(TargetMachine &TM) : addRegisterClass(MVT::i1, &AMDGPU::SReg_64RegClass); addRegisterClass(MVT::i64, &AMDGPU::VSrc_64RegClass); - addRegisterClass(MVT::v2i1, &AMDGPU::VReg_64RegClass); - addRegisterClass(MVT::v4i1, &AMDGPU::VReg_128RegClass); - addRegisterClass(MVT::v32i8, &AMDGPU::SReg_256RegClass); addRegisterClass(MVT::v64i8, &AMDGPU::SReg_512RegClass); @@ -110,6 +107,9 @@ bool SITargetLowering::allowsUnalignedMemoryAccesses(EVT VT, return VT.bitsGT(MVT::i32); } +bool SITargetLowering::shouldSplitVectorElementType(EVT VT) const { + return VT.bitsLE(MVT::i8); +} SDValue SITargetLowering::LowerParameter(SelectionDAG &DAG, EVT VT, SDLoc DL, SDValue Chain, |