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author | Tom Stellard <thomas.stellard@amd.com> | 2013-07-12 18:15:08 +0000 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2013-07-12 18:15:08 +0000 |
commit | d2442c10f9bfe8a9d6cdcb28030d32deb5b192b1 (patch) | |
tree | ac1365c977003b8bbafb4a5891e95f3d856ccbf4 /lib/Target/R600/SIISelLowering.cpp | |
parent | 54453c11b429a4f90f64bd83e113c69008cbd9ed (diff) | |
download | external_llvm-d2442c10f9bfe8a9d6cdcb28030d32deb5b192b1.zip external_llvm-d2442c10f9bfe8a9d6cdcb28030d32deb5b192b1.tar.gz external_llvm-d2442c10f9bfe8a9d6cdcb28030d32deb5b192b1.tar.bz2 |
R600/SI: Add double precision fsub pattern for SI
Patch by: Niels Ole Salscheider
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186179 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/R600/SIISelLowering.cpp')
-rw-r--r-- | lib/Target/R600/SIISelLowering.cpp | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/lib/Target/R600/SIISelLowering.cpp b/lib/Target/R600/SIISelLowering.cpp index 4d0fdf3..336bfbf 100644 --- a/lib/Target/R600/SIISelLowering.cpp +++ b/lib/Target/R600/SIISelLowering.cpp @@ -296,6 +296,21 @@ MachineBasicBlock * SITargetLowering::EmitInstrWithCustomInserter( MI->eraseFromParent(); break; } + case AMDGPU::V_SUB_F64: { + const SIInstrInfo *TII = + static_cast<const SIInstrInfo*>(getTargetMachine().getInstrInfo()); + BuildMI(*BB, I, MI->getDebugLoc(), TII->get(AMDGPU::V_ADD_F64), + MI->getOperand(0).getReg()) + .addReg(MI->getOperand(1).getReg()) + .addReg(MI->getOperand(2).getReg()) + .addImm(0) /* src2 */ + .addImm(0) /* ABS */ + .addImm(0) /* CLAMP */ + .addImm(0) /* OMOD */ + .addImm(2); /* NEG */ + MI->eraseFromParent(); + break; + } } return BB; } |