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author | Tom Stellard <thomas.stellard@amd.com> | 2013-08-06 23:08:18 +0000 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2013-08-06 23:08:18 +0000 |
commit | 3406d882c02a6cd1e16f4636351c23dcb68d785f (patch) | |
tree | 8917feb5d7791dc1e741bb30d67ae2055a7f8b92 /lib/Target/R600/SIISelLowering.h | |
parent | 06d63b31beb38a0c30dfa94543e53d8632531417 (diff) | |
download | external_llvm-3406d882c02a6cd1e16f4636351c23dcb68d785f.zip external_llvm-3406d882c02a6cd1e16f4636351c23dcb68d785f.tar.gz external_llvm-3406d882c02a6cd1e16f4636351c23dcb68d785f.tar.bz2 |
R600/SI: Add more special cases for opcodes to ensureSRegLimit()
Also factor out the register class lookup to its own function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187830 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/R600/SIISelLowering.h')
-rw-r--r-- | lib/Target/R600/SIISelLowering.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/Target/R600/SIISelLowering.h b/lib/Target/R600/SIISelLowering.h index 08c1d17..b4202c4 100644 --- a/lib/Target/R600/SIISelLowering.h +++ b/lib/Target/R600/SIISelLowering.h @@ -30,6 +30,8 @@ class SITargetLowering : public AMDGPUTargetLowering { bool foldImm(SDValue &Operand, int32_t &Immediate, bool &ScalarSlotUsed) const; + const TargetRegisterClass *getRegClassForNode(SelectionDAG &DAG, + const SDValue &Op) const; bool fitsRegClass(SelectionDAG &DAG, const SDValue &Op, unsigned RegClass) const; void ensureSRegLimit(SelectionDAG &DAG, SDValue &Operand, |