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authorTom Stellard <thomas.stellard@amd.com>2013-05-20 15:02:01 +0000
committerTom Stellard <thomas.stellard@amd.com>2013-05-20 15:02:01 +0000
commit9bf4590aaa26ebb5afdbec079daeee8e0b268b47 (patch)
treea3cb707e68b69fdf1840d28551c58d34d7f5ff12 /lib/Target/R600/SIISelLowering.h
parent30a7a7c1fdbd2607345dd1554e3436749fd75c6e (diff)
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R600/SI: Make fitsRegClass() operands const
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182282 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/R600/SIISelLowering.h')
-rw-r--r--lib/Target/R600/SIISelLowering.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/Target/R600/SIISelLowering.h b/lib/Target/R600/SIISelLowering.h
index af0625f..62dfeda 100644
--- a/lib/Target/R600/SIISelLowering.h
+++ b/lib/Target/R600/SIISelLowering.h
@@ -30,7 +30,8 @@ class SITargetLowering : public AMDGPUTargetLowering {
bool foldImm(SDValue &Operand, int32_t &Immediate,
bool &ScalarSlotUsed) const;
- bool fitsRegClass(SelectionDAG &DAG, SDValue &Op, unsigned RegClass) const;
+ bool fitsRegClass(SelectionDAG &DAG, const SDValue &Op,
+ unsigned RegClass) const;
void ensureSRegLimit(SelectionDAG &DAG, SDValue &Operand,
unsigned RegClass, bool &ScalarSlotUsed) const;