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| author | Michel Danzer <michel.daenzer@amd.com> | 2013-02-14 19:03:25 +0000 |
|---|---|---|
| committer | Michel Danzer <michel.daenzer@amd.com> | 2013-02-14 19:03:25 +0000 |
| commit | 01115b1f5032b848659669b161af1bdd9e646208 (patch) | |
| tree | d9b0a1d59292c3150d80fc98026e7c0aacf9098a /lib/Target/R600/SIInstructions.td | |
| parent | 06121de923cb7e8e2ea3cf527f281d9e7825e518 (diff) | |
| download | external_llvm-01115b1f5032b848659669b161af1bdd9e646208.zip external_llvm-01115b1f5032b848659669b161af1bdd9e646208.tar.gz external_llvm-01115b1f5032b848659669b161af1bdd9e646208.tar.bz2 | |
R600/SI: Fix int_SI_fs_interp_constant
The important fix is that the constant interpolation value is stored in the
parameter slot P0, which is encoded as 2.
In addition, drop the SI_INTERP_CONST pseudo instruction, pass the parameter
slot as an operand to V_INTERP_MOV_F32 instead of hardcoding it there, and
add a special operand class for the parameter slots for type checking and
pretty printing.
NOTE: This is a candidate for the Mesa stable branch.
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175193 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/R600/SIInstructions.td')
| -rw-r--r-- | lib/Target/R600/SIInstructions.td | 29 |
1 files changed, 18 insertions, 11 deletions
diff --git a/lib/Target/R600/SIInstructions.td b/lib/Target/R600/SIInstructions.td index a09f243..b1533bd 100644 --- a/lib/Target/R600/SIInstructions.td +++ b/lib/Target/R600/SIInstructions.td @@ -11,6 +11,17 @@ // that are not yet supported remain commented out. //===----------------------------------------------------------------------===// +class InterpSlots { +int P0 = 2; +int P10 = 0; +int P20 = 1; +} +def INTERP : InterpSlots; + +def InterpSlot : Operand<i32> { + let PrintMethod = "printInterpSlot"; +} + def isSI : Predicate<"Subtarget.device()" "->getGeneration() == AMDGPUDeviceInfo::HD7XXX">; @@ -681,10 +692,9 @@ def V_INTERP_P2_F32 : VINTRP < def V_INTERP_MOV_F32 : VINTRP < 0x00000002, (outs VReg_32:$dst), - (ins i32imm:$attr_chan, i32imm:$attr, M0Reg:$m0), - "V_INTERP_MOV_F32", + (ins InterpSlot:$src0, i32imm:$attr_chan, i32imm:$attr, M0Reg:$m0), + "V_INTERP_MOV_F32 $dst, $src0, $attr_chan, $attr", []> { - let VSRC = 0; let DisableEncoding = "$m0"; } @@ -1079,14 +1089,6 @@ def SI_INTERP : InstSI < [] >; -def SI_INTERP_CONST : InstSI < - (outs VReg_32:$dst), - (ins i32imm:$attr_chan, i32imm:$attr, SReg_32:$params), - "SI_INTERP_CONST $dst, $attr_chan, $attr, $params", - [(set VReg_32:$dst, (int_SI_fs_interp_constant imm:$attr_chan, - imm:$attr, SReg_32:$params))] ->; - def SI_WQM : InstSI < (outs), (ins), @@ -1322,6 +1324,11 @@ def : Pat < /********** ===================== **********/ def : Pat < + (int_SI_fs_interp_constant imm:$attr_chan, imm:$attr, SReg_32:$params), + (V_INTERP_MOV_F32 INTERP.P0, imm:$attr_chan, imm:$attr, SReg_32:$params) +>; + +def : Pat < (int_SI_fs_interp_linear_center imm:$attr_chan, imm:$attr, SReg_32:$params), (SI_INTERP (f32 LINEAR_CENTER_I), (f32 LINEAR_CENTER_J), imm:$attr_chan, imm:$attr, SReg_32:$params) |