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| author | Michel Danzer <michel.daenzer@amd.com> | 2013-03-22 14:09:10 +0000 |
|---|---|---|
| committer | Michel Danzer <michel.daenzer@amd.com> | 2013-03-22 14:09:10 +0000 |
| commit | c446baa0be1ed2a3bf157519f89a65d348aad17c (patch) | |
| tree | 40af58e0c83b2a9a0c99ade02c590b93556fb32b /lib/Target/R600/SIInstructions.td | |
| parent | 3016056769639878b4f152838f0cf16d2e482339 (diff) | |
| download | external_llvm-c446baa0be1ed2a3bf157519f89a65d348aad17c.zip external_llvm-c446baa0be1ed2a3bf157519f89a65d348aad17c.tar.gz external_llvm-c446baa0be1ed2a3bf157519f89a65d348aad17c.tar.bz2 | |
R600: Use legacy (0 * anything = 0) MUL instructions for pow intrinsics
Fixes wrong lighting in some corner cases with r600g and radeonsi, e.g.
manifested by failure of two piglit/glean tests and intermittent black
patches in many apps.
Tested on SI and RS880.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=62012 [radeonsi]
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=58150 [r600g]
NOTE: This is a candidate for the Mesa stable branch.
Reviewed-by: Christian König <christian.koenig@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177730 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/R600/SIInstructions.td')
| -rw-r--r-- | lib/Target/R600/SIInstructions.td | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/lib/Target/R600/SIInstructions.td b/lib/Target/R600/SIInstructions.td index 05b04a9..dc75f01 100644 --- a/lib/Target/R600/SIInstructions.td +++ b/lib/Target/R600/SIInstructions.td @@ -1442,8 +1442,7 @@ def : Pat < /********** ================== **********/ /* llvm.AMDGPU.pow */ -/* XXX: We are using IEEE MUL, not the 0 * anything = 0 MUL, is this correct? */ -def : POW_Common <V_LOG_F32_e32, V_EXP_F32_e32, V_MUL_F32_e32, VReg_32>; +def : POW_Common <V_LOG_F32_e32, V_EXP_F32_e32, V_MUL_LEGACY_F32_e32, VReg_32>; def : Pat < (int_AMDGPU_div VSrc_32:$src0, VSrc_32:$src1), |