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| author | Stephen Hines <srhines@google.com> | 2013-08-07 15:07:10 -0700 |
|---|---|---|
| committer | Stephen Hines <srhines@google.com> | 2013-08-07 15:07:10 -0700 |
| commit | fab2daa4a1127ecb217abe2b07c1769122b6fee1 (patch) | |
| tree | 268ebfd1963fd98ba412e76819afdf95a7d4267b /lib/Target/R600/SILowerControlFlow.cpp | |
| parent | 8197ac1c1a0a91baa70c4dea8cb488f254ef974c (diff) | |
| parent | 10251753b6897adcd22cc981c0cc42f348c109de (diff) | |
| download | external_llvm-fab2daa4a1127ecb217abe2b07c1769122b6fee1.zip external_llvm-fab2daa4a1127ecb217abe2b07c1769122b6fee1.tar.gz external_llvm-fab2daa4a1127ecb217abe2b07c1769122b6fee1.tar.bz2 | |
Merge commit '10251753b6897adcd22cc981c0cc42f348c109de' into merge-20130807
Conflicts:
lib/Archive/ArchiveReader.cpp
lib/Support/Unix/PathV2.inc
Change-Id: I29d8c1e321a4a380b6013f00bac6a8e4b593cc4e
Diffstat (limited to 'lib/Target/R600/SILowerControlFlow.cpp')
| -rw-r--r-- | lib/Target/R600/SILowerControlFlow.cpp | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/lib/Target/R600/SILowerControlFlow.cpp b/lib/Target/R600/SILowerControlFlow.cpp index 5b434fb..c2e8f02 100644 --- a/lib/Target/R600/SILowerControlFlow.cpp +++ b/lib/Target/R600/SILowerControlFlow.cpp @@ -411,6 +411,7 @@ bool SILowerControlFlowPass::runOnMachineFunction(MachineFunction &MF) { TRI = MF.getTarget().getRegisterInfo(); bool HaveKill = false; + bool NeedM0 = false; bool NeedWQM = false; unsigned Depth = 0; @@ -482,6 +483,13 @@ bool SILowerControlFlowPass::runOnMachineFunction(MachineFunction &MF) { IndirectDst(MI); break; + case AMDGPU::DS_READ_B32: + NeedWQM = true; + // Fall through + case AMDGPU::DS_WRITE_B32: + NeedM0 = true; + break; + case AMDGPU::V_INTERP_P1_F32: case AMDGPU::V_INTERP_P2_F32: case AMDGPU::V_INTERP_MOV_F32: @@ -492,6 +500,14 @@ bool SILowerControlFlowPass::runOnMachineFunction(MachineFunction &MF) { } } + if (NeedM0) { + MachineBasicBlock &MBB = MF.front(); + // Initialize M0 to a value that won't cause LDS access to be discarded + // due to offset clamping + BuildMI(MBB, MBB.getFirstNonPHI(), DebugLoc(), TII->get(AMDGPU::S_MOV_B32), + AMDGPU::M0).addImm(0xffffffff); + } + if (NeedWQM) { MachineBasicBlock &MBB = MF.front(); BuildMI(MBB, MBB.getFirstNonPHI(), DebugLoc(), TII->get(AMDGPU::S_WQM_B64), |