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author | Stephen Hines <srhines@google.com> | 2014-12-04 19:51:48 +0000 |
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committer | Android Git Automerger <android-git-automerger@android.com> | 2014-12-04 19:51:48 +0000 |
commit | a21bbdfad461e957fa42ac9d6860ddc9de2da3e9 (patch) | |
tree | 8d32ff2094b47e15a8def30d62fd7dee6e009de3 /lib/Target/Sparc/DelaySlotFiller.cpp | |
parent | 6b8c6a5088c221af2b25065b8b6b8b0fec8a116f (diff) | |
parent | 876d6995443e99d13696f3941c3a789a4daa7c7a (diff) | |
download | external_llvm-a21bbdfad461e957fa42ac9d6860ddc9de2da3e9.zip external_llvm-a21bbdfad461e957fa42ac9d6860ddc9de2da3e9.tar.gz external_llvm-a21bbdfad461e957fa42ac9d6860ddc9de2da3e9.tar.bz2 |
am 876d6995: Merge "Update aosp/master LLVM for rebase to r222494."
* commit '876d6995443e99d13696f3941c3a789a4daa7c7a':
Update aosp/master LLVM for rebase to r222494.
Diffstat (limited to 'lib/Target/Sparc/DelaySlotFiller.cpp')
-rw-r--r-- | lib/Target/Sparc/DelaySlotFiller.cpp | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/lib/Target/Sparc/DelaySlotFiller.cpp b/lib/Target/Sparc/DelaySlotFiller.cpp index f3441ff..28369fd 100644 --- a/lib/Target/Sparc/DelaySlotFiller.cpp +++ b/lib/Target/Sparc/DelaySlotFiller.cpp @@ -110,7 +110,7 @@ FunctionPass *llvm::createSparcDelaySlotFillerPass(TargetMachine &tm) { bool Filler::runOnMachineBasicBlock(MachineBasicBlock &MBB) { bool Changed = false; - const TargetInstrInfo *TII = TM.getInstrInfo(); + const TargetInstrInfo *TII = TM.getSubtargetImpl()->getInstrInfo(); for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); ) { MachineBasicBlock::iterator MI = I; @@ -187,7 +187,7 @@ Filler::findDelayInstr(MachineBasicBlock &MBB, if (J->getOpcode() == SP::RESTORErr || J->getOpcode() == SP::RESTOREri) { // change retl to ret. - slot->setDesc(TM.getInstrInfo()->get(SP::RET)); + slot->setDesc(TM.getSubtargetImpl()->getInstrInfo()->get(SP::RET)); return J; } } @@ -329,7 +329,8 @@ void Filler::insertDefsUses(MachineBasicBlock::iterator MI, bool Filler::IsRegInSet(SmallSet<unsigned, 32>& RegSet, unsigned Reg) { // Check Reg and all aliased Registers. - for (MCRegAliasIterator AI(Reg, TM.getRegisterInfo(), true); + for (MCRegAliasIterator AI(Reg, TM.getSubtargetImpl()->getRegisterInfo(), + true); AI.isValid(); ++AI) if (RegSet.count(*AI)) return true; @@ -482,7 +483,7 @@ bool Filler::tryCombineRestoreWithPrevInst(MachineBasicBlock &MBB, if (PrevInst->isBundledWithSucc()) return false; - const TargetInstrInfo *TII = TM.getInstrInfo(); + const TargetInstrInfo *TII = TM.getSubtargetImpl()->getInstrInfo(); switch (PrevInst->getOpcode()) { default: break; |