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author | Owen Anderson <resistor@mac.com> | 2010-09-21 18:41:19 +0000 |
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committer | Owen Anderson <resistor@mac.com> | 2010-09-21 18:41:19 +0000 |
commit | 0caaab0a26180e1a06e64e1440214def8c2272c6 (patch) | |
tree | 23a74efbf817f08bb796242ade0c68d03bf68c17 /lib/Target/Sparc/SparcISelLowering.cpp | |
parent | 3c843c5a0bb2fe0ef15c568f170e483ff47403ec (diff) | |
download | external_llvm-0caaab0a26180e1a06e64e1440214def8c2272c6.zip external_llvm-0caaab0a26180e1a06e64e1440214def8c2272c6.tar.gz external_llvm-0caaab0a26180e1a06e64e1440214def8c2272c6.tar.bz2 |
When adding the carry bit to another value on X86, exploit the fact that the carry-materialization
(sbbl x, x) sets the registers to 0 or ~0. Combined with two's complement arithmetic, we can fold
the intermediate AND and the ADD into a single SUB.
This fixes <rdar://problem/8449754>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114460 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Sparc/SparcISelLowering.cpp')
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