aboutsummaryrefslogtreecommitdiffstats
path: root/lib/Target/Sparc
diff options
context:
space:
mode:
authorChris Lattner <sabre@nondot.org>2010-04-02 20:16:16 +0000
committerChris Lattner <sabre@nondot.org>2010-04-02 20:16:16 +0000
commitc7f3ace20c325521c68335a1689645b43b06ddf0 (patch)
tree901a5d915c2a5d1003a41c1001a637d2621d44f5 /lib/Target/Sparc
parentde4845c163a5847c82d7ce10ed0c320098bce6e0 (diff)
downloadexternal_llvm-c7f3ace20c325521c68335a1689645b43b06ddf0.zip
external_llvm-c7f3ace20c325521c68335a1689645b43b06ddf0.tar.gz
external_llvm-c7f3ace20c325521c68335a1689645b43b06ddf0.tar.bz2
use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100214 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Sparc')
-rw-r--r--lib/Target/Sparc/DelaySlotFiller.cpp2
-rw-r--r--lib/Target/Sparc/SparcInstrInfo.cpp10
-rw-r--r--lib/Target/Sparc/SparcRegisterInfo.cpp3
3 files changed, 7 insertions, 8 deletions
diff --git a/lib/Target/Sparc/DelaySlotFiller.cpp b/lib/Target/Sparc/DelaySlotFiller.cpp
index 15b26c2..9e148ad 100644
--- a/lib/Target/Sparc/DelaySlotFiller.cpp
+++ b/lib/Target/Sparc/DelaySlotFiller.cpp
@@ -68,7 +68,7 @@ bool Filler::runOnMachineBasicBlock(MachineBasicBlock &MBB) {
if (I->getDesc().hasDelaySlot()) {
MachineBasicBlock::iterator J = I;
++J;
- BuildMI(MBB, J, DebugLoc::getUnknownLoc(), TII->get(SP::NOP));
+ BuildMI(MBB, J, DebugLoc(), TII->get(SP::NOP));
++FilledSlots;
Changed = true;
}
diff --git a/lib/Target/Sparc/SparcInstrInfo.cpp b/lib/Target/Sparc/SparcInstrInfo.cpp
index 8667bca..e494d7d 100644
--- a/lib/Target/Sparc/SparcInstrInfo.cpp
+++ b/lib/Target/Sparc/SparcInstrInfo.cpp
@@ -111,7 +111,7 @@ SparcInstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
const SmallVectorImpl<MachineOperand> &Cond)const{
// FIXME this should probably take a DebugLoc argument
- DebugLoc dl = DebugLoc::getUnknownLoc();
+ DebugLoc dl;
// Can only insert uncond branches so far.
assert(Cond.empty() && !FBB && TBB && "Can only handle uncond branches!");
BuildMI(&MBB, dl, get(SP::BA)).addMBB(TBB);
@@ -128,7 +128,7 @@ bool SparcInstrInfo::copyRegToReg(MachineBasicBlock &MBB,
return false;
}
- DebugLoc DL = DebugLoc::getUnknownLoc();
+ DebugLoc DL;
if (I != MBB.end()) DL = I->getDebugLoc();
if (DestRC == SP::IntRegsRegisterClass)
@@ -149,7 +149,7 @@ void SparcInstrInfo::
storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
unsigned SrcReg, bool isKill, int FI,
const TargetRegisterClass *RC) const {
- DebugLoc DL = DebugLoc::getUnknownLoc();
+ DebugLoc DL;
if (I != MBB.end()) DL = I->getDebugLoc();
// On the order of operands here: think "[FrameIdx + 0] = SrcReg".
@@ -170,7 +170,7 @@ void SparcInstrInfo::
loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
unsigned DestReg, int FI,
const TargetRegisterClass *RC) const {
- DebugLoc DL = DebugLoc::getUnknownLoc();
+ DebugLoc DL;
if (I != MBB.end()) DL = I->getDebugLoc();
if (RC == SP::IntRegsRegisterClass)
@@ -253,7 +253,7 @@ unsigned SparcInstrInfo::getGlobalBaseReg(MachineFunction *MF) const
GlobalBaseReg = RegInfo.createVirtualRegister(&SP::IntRegsRegClass);
- DebugLoc dl = DebugLoc::getUnknownLoc();
+ DebugLoc dl;
BuildMI(FirstMBB, MBBI, dl, get(SP::GETPCX), GlobalBaseReg);
SparcFI->setGlobalBaseReg(GlobalBaseReg);
diff --git a/lib/Target/Sparc/SparcRegisterInfo.cpp b/lib/Target/Sparc/SparcRegisterInfo.cpp
index 740e3bc..08373bb 100644
--- a/lib/Target/Sparc/SparcRegisterInfo.cpp
+++ b/lib/Target/Sparc/SparcRegisterInfo.cpp
@@ -125,8 +125,7 @@ void SparcRegisterInfo::emitPrologue(MachineFunction &MF) const {
MachineBasicBlock &MBB = MF.front();
MachineFrameInfo *MFI = MF.getFrameInfo();
MachineBasicBlock::iterator MBBI = MBB.begin();
- DebugLoc dl = (MBBI != MBB.end() ?
- MBBI->getDebugLoc() : DebugLoc::getUnknownLoc());
+ DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
// Get the number of bytes to allocate from the FrameInfo
int NumBytes = (int) MFI->getStackSize();