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| author | Alkis Evlogimenos <alkis@evlogimenos.com> | 2003-12-14 13:24:17 +0000 |
|---|---|---|
| committer | Alkis Evlogimenos <alkis@evlogimenos.com> | 2003-12-14 13:24:17 +0000 |
| commit | 4d7af65903cbc858464362e70a6adf499982ec8a (patch) | |
| tree | 5f40fb851e4f08c9aa8ebe952bb876ccb02c2ffb /lib/Target/SparcV9/SparcV9CodeEmitter.cpp | |
| parent | 97323a47d88315b98e5ac38d64ba2a9e3f02b501 (diff) | |
| download | external_llvm-4d7af65903cbc858464362e70a6adf499982ec8a.zip external_llvm-4d7af65903cbc858464362e70a6adf499982ec8a.tar.gz external_llvm-4d7af65903cbc858464362e70a6adf499982ec8a.tar.bz2 | |
Change interface of MachineOperand as follows:
a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse()
b) add isUse(), isDef()
c) rename opHiBits32() to isHiBits32(),
opLoBits32() to isLoBits32(),
opHiBits64() to isHiBits64(),
opLoBits64() to isLoBits64().
This results to much more readable code, for example compare
"op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used
very often in the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10461 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/SparcV9/SparcV9CodeEmitter.cpp')
| -rw-r--r-- | lib/Target/SparcV9/SparcV9CodeEmitter.cpp | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/lib/Target/SparcV9/SparcV9CodeEmitter.cpp b/lib/Target/SparcV9/SparcV9CodeEmitter.cpp index be677e0..9a51faa 100644 --- a/lib/Target/SparcV9/SparcV9CodeEmitter.cpp +++ b/lib/Target/SparcV9/SparcV9CodeEmitter.cpp @@ -699,13 +699,13 @@ int64_t SparcV9CodeEmitter::getMachineOpValue(MachineInstr &MI, // are used in SPARC assembly. (Some of these make no sense in combination // with some of the above; we'll trust that the instruction selector // will not produce nonsense, and not check for valid combinations here.) - if (MO.opLoBits32()) { // %lo(val) == %lo() in Sparc ABI doc + if (MO.isLoBits32()) { // %lo(val) == %lo() in Sparc ABI doc return rv & 0x03ff; - } else if (MO.opHiBits32()) { // %lm(val) == %hi() in Sparc ABI doc + } else if (MO.isHiBits32()) { // %lm(val) == %hi() in Sparc ABI doc return (rv >> 10) & 0x03fffff; - } else if (MO.opLoBits64()) { // %hm(val) == %ulo() in Sparc ABI doc + } else if (MO.isLoBits64()) { // %hm(val) == %ulo() in Sparc ABI doc return (rv >> 32) & 0x03ff; - } else if (MO.opHiBits64()) { // %hh(val) == %uhi() in Sparc ABI doc + } else if (MO.isHiBits64()) { // %hh(val) == %uhi() in Sparc ABI doc return rv >> 42; } else { // (unadorned) val return rv; @@ -747,10 +747,10 @@ bool SparcV9CodeEmitter::runOnMachineFunction(MachineFunction &MF) { int64_t branchTarget = (Location - (long)Ref) >> 2; // Save the flags. bool loBits32=false, hiBits32=false, loBits64=false, hiBits64=false; - if (op.opLoBits32()) { loBits32=true; } - if (op.opHiBits32()) { hiBits32=true; } - if (op.opLoBits64()) { loBits64=true; } - if (op.opHiBits64()) { hiBits64=true; } + if (op.isLoBits32()) { loBits32=true; } + if (op.isHiBits32()) { hiBits32=true; } + if (op.isLoBits64()) { loBits64=true; } + if (op.isHiBits64()) { hiBits64=true; } MI->SetMachineOperandConst(ii, MachineOperand::MO_SignExtendedImmed, branchTarget); if (loBits32) { MI->setOperandLo32(ii); } |