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authorVikram S. Adve <vadve@cs.uiuc.edu>2001-11-12 18:54:11 +0000
committerVikram S. Adve <vadve@cs.uiuc.edu>2001-11-12 18:54:11 +0000
commit3438b21ebde9424e26561e39c2882bf2368167d8 (patch)
treeeddb30e29a9cd2958be1d9c4091e5247db68d802 /lib/Target/SparcV9/SparcV9InstrSelection.cpp
parent200a4359661e5ef8ec952a088ecc723d4581f606 (diff)
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Disable use of the Phi machine instruction which is no longer needed
for register allocation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1270 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/SparcV9/SparcV9InstrSelection.cpp')
-rw-r--r--lib/Target/SparcV9/SparcV9InstrSelection.cpp5
1 files changed, 5 insertions, 0 deletions
diff --git a/lib/Target/SparcV9/SparcV9InstrSelection.cpp b/lib/Target/SparcV9/SparcV9InstrSelection.cpp
index 533d74c..4feecbb 100644
--- a/lib/Target/SparcV9/SparcV9InstrSelection.cpp
+++ b/lib/Target/SparcV9/SparcV9InstrSelection.cpp
@@ -2017,6 +2017,10 @@ GetInstructionsByRule(InstructionNode* subtreeRoot,
}
case 64: // reg: Phi(reg,reg)
+ numInstr = 0; // don't forward the value
+ break;
+#undef NEED_PHI_MACHINE_INSTRS
+#ifdef NEED_PHI_MACHINE_INSTRS
{ // This instruction has variable #operands, so resultPos is 0.
Instruction* phi = subtreeRoot->getInstruction();
mvec[0] = new MachineInstr(PHI, 1 + phi->getNumOperands());
@@ -2027,6 +2031,7 @@ GetInstructionsByRule(InstructionNode* subtreeRoot,
phi->getOperand(i));
break;
}
+#endif NEED_PHI_MACHINE_INSTRS
case 71: // reg: VReg
case 72: // reg: Constant