SparcV9CodeEmitter.cpp is a part of the Sparc code emitter. The main function

that assembles instructions is generated via TableGen (and hence must be built
before building this directory, but that's already the case in the top-level
Makefile).

Also added is .cvsignore to ignore the generated file `SparcV9CodeEmitter.inc',
which is included by SparcV9CodeEmitter.cpp .


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6357 91177308-0d34-0410-b5e6-96231b3b80d8

3 files changed, 94 insertions, 0 deletions

diff --git a/lib/Target/SparcV9/.cvsignore b/lib/Target/SparcV9/.cvsignore
new file mode 100644
index 0000000..636b15c
--- /dev/null
+++ b/lib/Target/SparcV9/.cvsignore
@@ -0,0 +1 @@
+SparcV9CodeEmitter.inc
diff --git a/lib/Target/SparcV9/Makefile b/lib/Target/SparcV9/Makefile
index 68c6fee..aca3a0e 100644
--- a/lib/Target/SparcV9/Makefile
+++ b/lib/Target/SparcV9/Makefile
@@ -32,3 +32,6 @@ Debug/Sparc.burm : Debug/Sparc.burg.in1
 $(BUILD_ROOT)/Depend/Sparc.burm.d: $(BUILD_ROOT)/Depend/.dir
 	touch $@
 
+SparcV9CodeEmitter.inc: SparcV9.td
+	@echo "TableGen-erating $@"
+	cpp -P SparcV9.td | tblgen -gen-emitter > SparcV9CodeEmitter.inc
diff --git a/lib/Target/SparcV9/SparcV9CodeEmitter.cpp b/lib/Target/SparcV9/SparcV9CodeEmitter.cpp
new file mode 100644
index 0000000..4f77990
--- /dev/null
+++ b/lib/Target/SparcV9/SparcV9CodeEmitter.cpp
@@ -0,0 +1,90 @@
+#include "llvm/PassManager.h"
+#include "llvm/CodeGen/MachineCodeEmitter.h"
+#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/MachineInstr.h"
+#include "SparcInternals.h"
+
+namespace {
+  class SparcV9CodeEmitter : public MachineFunctionPass {
+    MachineCodeEmitter &MCE;
+
+  public:
+    SparcV9CodeEmitter(MachineCodeEmitter &M) : MCE(M) {}
+    
+    bool runOnMachineFunction(MachineFunction &F);
+    
+  private:    
+    int64_t getMachineOpValue(MachineOperand &MO);
+    unsigned getValueBit(int64_t Val, unsigned bit);
+
+    void emitConstant(unsigned Val, unsigned Size);
+
+    void emitBasicBlock(MachineBasicBlock &MBB);
+    void emitInstruction(MachineInstr &MI);
+    
+    /// Function generated by the CodeEmitterGenerator using TableGen
+    ///
+    unsigned getBinaryCodeForInstr(MachineInstr &MI);
+  };
+}
+
+bool UltraSparc::addPassesToEmitMachineCode(PassManager &PM,
+                                            MachineCodeEmitter &MCE) {
+  //PM.add(new SparcV9CodeEmitter(MCE));
+  //MachineCodeEmitter *M = MachineCodeEmitter::createDebugMachineCodeEmitter();
+  MachineCodeEmitter *M = 
+    MachineCodeEmitter::createFilePrinterMachineCodeEmitter();
+  PM.add(new SparcV9CodeEmitter(*M));
+  return false;
+}
+
+void SparcV9CodeEmitter::emitConstant(unsigned Val, unsigned Size) {
+  // Output the constant in big endian byte order...
+  unsigned byteVal;
+  for (int i = Size-1; i >= 0; --i) {
+    byteVal = Val >> 8*i;
+    MCE.emitByte(byteVal & 255);
+  }
+}
+
+int64_t SparcV9CodeEmitter::getMachineOpValue(MachineOperand &MO) {
+  if (MO.isPhysicalRegister()) {
+    return MO.getReg();
+  } else if (MO.isImmediate()) {
+    return MO.getImmedValue();
+  } else if (MO.isPCRelativeDisp()) {
+    // FIXME!!!
+    //return MO.getPCRelativeDisp();
+    return 0;
+  } else {
+    assert(0 && "Unknown type of MachineOperand");
+    return 0;
+  }
+}
+
+unsigned SparcV9CodeEmitter::getValueBit(int64_t Val, unsigned bit) {
+  Val >>= bit;
+  return (Val & 1);
+}
+
+
+bool SparcV9CodeEmitter::runOnMachineFunction(MachineFunction &MF) {
+  MCE.startFunction(MF);
+  MCE.emitConstantPool(MF.getConstantPool());
+  for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
+    emitBasicBlock(*I);
+  MCE.finishFunction(MF);
+  return false;
+}
+
+void SparcV9CodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
+  MCE.startBasicBlock(MBB);
+  for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I)
+    emitInstruction(**I);
+}
+
+void SparcV9CodeEmitter::emitInstruction(MachineInstr &MI) {
+  emitConstant(getBinaryCodeForInstr(MI), 4);
+}
+
+#include "SparcV9CodeEmitter.inc"