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author | Misha Brukman <brukman+llvm@gmail.com> | 2003-10-10 17:57:28 +0000 |
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committer | Misha Brukman <brukman+llvm@gmail.com> | 2003-10-10 17:57:28 +0000 |
commit | cf00c4ab3ba308d45d98c5ccab87362cf802facb (patch) | |
tree | ba6836d8bf430b9b2fb55ad5fd6d2a02f18a9f32 /lib/Target/SparcV9 | |
parent | 452fea997232437902385e88366482b01957eeef (diff) | |
download | external_llvm-cf00c4ab3ba308d45d98c5ccab87362cf802facb.zip external_llvm-cf00c4ab3ba308d45d98c5ccab87362cf802facb.tar.gz external_llvm-cf00c4ab3ba308d45d98c5ccab87362cf802facb.tar.bz2 |
Fix spelling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9027 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/SparcV9')
-rw-r--r-- | lib/Target/SparcV9/MappingInfo.cpp | 2 | ||||
-rw-r--r-- | lib/Target/SparcV9/SparcV9CodeEmitter.cpp | 13 | ||||
-rw-r--r-- | lib/Target/SparcV9/SparcV9RegClassInfo.cpp | 4 | ||||
-rw-r--r-- | lib/Target/SparcV9/SparcV9RegInfo.cpp | 4 |
4 files changed, 12 insertions, 11 deletions
diff --git a/lib/Target/SparcV9/MappingInfo.cpp b/lib/Target/SparcV9/MappingInfo.cpp index 999b603..5f496bf 100644 --- a/lib/Target/SparcV9/MappingInfo.cpp +++ b/lib/Target/SparcV9/MappingInfo.cpp @@ -132,7 +132,7 @@ bool MappingInfoAsmPrinter::doInitialization(Module &M) { /// Function. MachineBasicBlocks are numbered from begin() to end() /// in the Function's corresponding MachineFunction. Each successive /// MachineBasicBlock increments the numbering by the number of instructions -/// it contains. The side-effect of this method is to fill in the paramete +/// it contains. The side-effect of this method is to fill in the parameter /// KEY with the mapping of MachineBasicBlocks to numbers. KEY /// is keyed on MachineInstrs, so each MachineBasicBlock is represented /// therein by its first MachineInstr. diff --git a/lib/Target/SparcV9/SparcV9CodeEmitter.cpp b/lib/Target/SparcV9/SparcV9CodeEmitter.cpp index 70c41e1..819b862 100644 --- a/lib/Target/SparcV9/SparcV9CodeEmitter.cpp +++ b/lib/Target/SparcV9/SparcV9CodeEmitter.cpp @@ -366,10 +366,11 @@ void JITResolver::CompilationCallback() { RestoreRegisters(DoubleFP, FSR, FPRS, CCR); - // Change the return address to reexecute the restore, then the jump. However, - // we can't just modify %i7 here, because we return to the function that will - // restore the floating-point registers for us. Thus, we just return the value - // we want it to be, and the parent will take care of setting %i7 correctly. + // Change the return address to re-execute the restore, then the jump. + // However, we can't just modify %i7 here, because we return to the function + // that will restore the floating-point registers for us. Thus, we just return + // the value we want it to be, and the parent will take care of setting %i7 + // correctly. DEBUG(std::cerr << "Callback returning to: 0x" << std::hex << (CameFrom-Offset-12) << "\n"); #if defined(sparc) || defined(__sparc__) || defined(__sparcv9) @@ -482,7 +483,7 @@ SparcV9CodeEmitter::getRealRegNum(unsigned fakeReg, // only numbered 0-31, hence can already fit into 5 bits (and 6) DEBUG(std::cerr << "FP single reg, returning: " << fakeReg << "\n"); } else if (regType == UltraSparcRegInfo::FPDoubleRegType) { - // FIXME: This assumes that we only have 5-bit register fiels! + // FIXME: This assumes that we only have 5-bit register fields! // From Sparc Manual, page 40. // The bit layout becomes: b[4], b[3], b[2], b[1], b[5] fakeReg |= (fakeReg >> 5) & 1; @@ -624,7 +625,7 @@ int64_t SparcV9CodeEmitter::getMachineOpValue(MachineInstr &MI, int64_t CallInstTarget = (rv - CurrPC) >> 2; if (CallInstTarget >= (1<<29) || CallInstTarget <= -(1<<29)) { DEBUG(std::cerr << "Making far call!\n"); - // addresss is out of bounds for the 30-bit call, + // address is out of bounds for the 30-bit call, // make an indirect jump-and-link emitFarCall(rv); // this invalidates the instruction so that the call with an incorrect diff --git a/lib/Target/SparcV9/SparcV9RegClassInfo.cpp b/lib/Target/SparcV9/SparcV9RegClassInfo.cpp index 8f51264..6248a83 100644 --- a/lib/Target/SparcV9/SparcV9RegClassInfo.cpp +++ b/lib/Target/SparcV9/SparcV9RegClassInfo.cpp @@ -261,7 +261,7 @@ void SparcFloatRegClass::colorIGNode(IGNode * Node, return; } else { - // if we didn't find a color becuase the LR was single precision or + // if we didn't find a color because the LR was single precision or // all f32-f63 range is filled, we try to allocate a register from // the f0 - f31 region @@ -292,7 +292,7 @@ void SparcFloatRegClass::colorIGNode(IGNode * Node, } if (ColorFound >= 0) { - LR->setColor(ColorFound); // first color found in prefered order + LR->setColor(ColorFound); // first color found in preferred order LR->markForSaveAcrossCalls(); } else { // we are here because no color could be found diff --git a/lib/Target/SparcV9/SparcV9RegInfo.cpp b/lib/Target/SparcV9/SparcV9RegInfo.cpp index a46af22..8dde4e9 100644 --- a/lib/Target/SparcV9/SparcV9RegInfo.cpp +++ b/lib/Target/SparcV9/SparcV9RegInfo.cpp @@ -466,7 +466,7 @@ void UltraSparcRegInfo::colorMethodArgs(const Function *Meth, } else { - // Now the arg is coming on stack. Since the LR recieved a register, + // Now the arg is coming on stack. Since the LR received a register, // we just have to load the arg on stack into that register // const TargetFrameInfo& frameInfo = target.getFrameInfo(); @@ -522,7 +522,7 @@ void UltraSparcRegInfo::colorMethodArgs(const Function *Meth, else { // Now the arg is coming on stack. Since the LR did NOT - // recieved a register as well, it is allocated a stack position. We + // received a register as well, it is allocated a stack position. We // can simply change the stack position of the LR. We can do this, // since this method is called before any other method that makes // uses of the stack pos of the LR (e.g., updateMachineInstr) |