Regularize header file comments

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9071 91177308-0d34-0410-b5e6-96231b3b80d8

4 files changed, 10 insertions, 13 deletions

diff --git a/lib/Target/SparcV9/InstrSched/SchedGraph.h b/lib/Target/SparcV9/InstrSched/SchedGraph.h
index 4da761f..11a4f87 100644
--- a/lib/Target/SparcV9/InstrSched/SchedGraph.h
+++ b/lib/Target/SparcV9/InstrSched/SchedGraph.h
@@ -1,13 +1,11 @@
-//===-- SchedGraph.h - Scheduling Graph --------------------------*- C++ -*--=//
+//===-- SchedGraph.h - Scheduling Graph -------------------------*- C++ -*-===//
 //
-// Purpose:
-//	Scheduling graph based on SSA graph plus extra dependence edges
-//	capturing dependences due to machine resources (machine registers,
-//	CC registers, and any others).
+// This is a scheduling graph based on SSA graph plus extra dependence edges
+// capturing dependences due to machine resources (machine registers, CC
+// registers, and any others).
 // 
-// Strategy:
-//	This graph tries to leverage the SSA graph as much as possible,
-//	but captures the extra dependences through a common interface.
+// This graph tries to leverage the SSA graph as much as possible, but captures
+// the extra dependences through a common interface.
 // 
 //===----------------------------------------------------------------------===//
 
diff --git a/lib/Target/SparcV9/LiveVar/BBLiveVar.h b/lib/Target/SparcV9/LiveVar/BBLiveVar.h
index d900629..88e99a8 100644
--- a/lib/Target/SparcV9/LiveVar/BBLiveVar.h
+++ b/lib/Target/SparcV9/LiveVar/BBLiveVar.h
@@ -1,4 +1,4 @@
-//===-- BBLiveVar.h - Live Variable Analysis for a BasicBlock ----*- C++ -*--=//
+//===-- BBLiveVar.h - Live Variable Analysis for a BasicBlock ---*- C++ -*-===//
 //
 // This is a BasicBlock annotation class that is used by live var analysis to
 // hold data flow information for a basic block.
diff --git a/lib/Target/SparcV9/ModuloScheduling/ModuloScheduling.cpp b/lib/Target/SparcV9/ModuloScheduling/ModuloScheduling.cpp
index 5b6fb09..49562f4 100644
--- a/lib/Target/SparcV9/ModuloScheduling/ModuloScheduling.cpp
+++ b/lib/Target/SparcV9/ModuloScheduling/ModuloScheduling.cpp
@@ -1,4 +1,4 @@
-//===-- ModuloScheduling.cpp - Software Pipeling Approach - SMS --*- C++ -*--=//
+//===-- ModuloScheduling.cpp - Software Pipeling Approach - SMS -----------===//
 //
 // The is a software pipelining pass based on the Swing Modulo Scheduling
 // algorithm (SMS).
diff --git a/lib/Target/SparcV9/SparcV9RegClassInfo.h b/lib/Target/SparcV9/SparcV9RegClassInfo.h
index 30ec42d..17e94ae 100644
--- a/lib/Target/SparcV9/SparcV9RegClassInfo.h
+++ b/lib/Target/SparcV9/SparcV9RegClassInfo.h
@@ -1,6 +1,6 @@
-//===-- SparcRegClassInfo.h - Register class def'ns for Sparc ----*- C++ -*--=//
+//===-- SparcRegClassInfo.h - Register class def'ns for Sparc ---*- C++ -*-===//
 //
-//  This file defines the register classes used by the Sparc target description.
+// This file defines the register classes used by the Sparc target description.
 //
 //===----------------------------------------------------------------------===//
 
@@ -13,7 +13,6 @@
 // Integer Register Class
 //-----------------------------------------------------------------------------
 
-
 struct SparcIntRegClass : public TargetRegClassInfo {
   SparcIntRegClass(unsigned ID) 
     : TargetRegClassInfo(ID, NumOfAvailRegs, NumOfAllRegs) {  }