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author | Anton Korobeynikov <asl@math.spbu.ru> | 2009-07-16 14:10:35 +0000 |
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committer | Anton Korobeynikov <asl@math.spbu.ru> | 2009-07-16 14:10:35 +0000 |
commit | 514a097774455e4c117a2795ae4992daa802f581 (patch) | |
tree | 7eb41bf2cb55278f298f612da74b11129f973937 /lib/Target/SystemZ/SystemZISelDAGToDAG.cpp | |
parent | db3bc87b16dd5dc1298870c05ae609f3b3272707 (diff) | |
download | external_llvm-514a097774455e4c117a2795ae4992daa802f581.zip external_llvm-514a097774455e4c117a2795ae4992daa802f581.tar.gz external_llvm-514a097774455e4c117a2795ae4992daa802f581.tar.bz2 |
Typos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75991 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/SystemZ/SystemZISelDAGToDAG.cpp')
-rw-r--r-- | lib/Target/SystemZ/SystemZISelDAGToDAG.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp b/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp index d1bd2d6..fb0c5dc 100644 --- a/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp +++ b/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp @@ -312,7 +312,7 @@ bool SystemZDAGToDAGISel::MatchAddressBase(SDValue N, SystemZRRIAddressMode &AM) { // Is the base register already occupied? if (AM.BaseType != SystemZRRIAddressMode::RegBase || AM.Base.Reg.getNode()) { - // If so, check to see if the scale register is set. + // If so, check to see if the index register is set. if (AM.IndexReg.getNode() == 0 && !AM.isRI) { AM.IndexReg = N; return false; @@ -439,7 +439,7 @@ bool SystemZDAGToDAGISel::SelectAddrRI(SDValue Op, SDValue& Addr, /// index register plus an unsigned 12-bit displacement [base + idx + imm]. bool SystemZDAGToDAGISel::SelectAddrRRI12(SDValue Op, SDValue Addr, SDValue &Base, SDValue &Disp, SDValue &Index) { - SystemZRRIAddressMode AM20(/*isRI*/true), AM12(/*isRI*/true); + SystemZRRIAddressMode AM20, AM12; bool Done = false; if (!Addr.hasOneUse()) { |