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author | Anton Korobeynikov <asl@math.spbu.ru> | 2009-07-16 13:48:42 +0000 |
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committer | Anton Korobeynikov <asl@math.spbu.ru> | 2009-07-16 13:48:42 +0000 |
commit | f7cefd93163d3078f09e64b69a4bf385e3c346d4 (patch) | |
tree | 6e6ae578f7a510641183b222d5ced310ce432e2c /lib/Target/SystemZ/SystemZISelDAGToDAG.cpp | |
parent | d3c94e7a8c76ac1b0d0eb0235d5c9e12be9d7bf8 (diff) | |
download | external_llvm-f7cefd93163d3078f09e64b69a4bf385e3c346d4.zip external_llvm-f7cefd93163d3078f09e64b69a4bf385e3c346d4.tar.gz external_llvm-f7cefd93163d3078f09e64b69a4bf385e3c346d4.tar.bz2 |
Swap the order of imm and idx field for rri addrmode in order to make handling of rri and ri addrmodes common
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75937 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/SystemZ/SystemZISelDAGToDAG.cpp')
-rw-r--r-- | lib/Target/SystemZ/SystemZISelDAGToDAG.cpp | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp b/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp index 84081b4..3e1cc3c 100644 --- a/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp +++ b/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp @@ -105,14 +105,14 @@ namespace { #include "SystemZGenDAGISel.inc" private: + bool SelectAddrRI(const SDValue& Op, SDValue& Addr, + SDValue &Base, SDValue &Disp); bool SelectAddrRRI(SDValue Op, SDValue Addr, - SDValue &Base, SDValue &Index, SDValue &Disp); + SDValue &Base, SDValue &Disp, SDValue &Index); bool SelectLAAddr(SDValue Op, SDValue Addr, - SDValue &Base, SDValue &Index, SDValue &Disp); + SDValue &Base, SDValue &Disp, SDValue &Index); SDNode *Select(SDValue Op); - bool SelectAddrRI(const SDValue& Op, SDValue& Addr, - SDValue &Base, SDValue &Disp); bool MatchAddress(SDValue N, SystemZRRIAddressMode &AM, unsigned Depth = 0); bool MatchAddressBase(SDValue N, SystemZRRIAddressMode &AM); @@ -368,7 +368,7 @@ bool SystemZDAGToDAGISel::MatchAddressBase(SDValue N, /// Returns true if the address can be represented by a base register plus /// index register plus a signed 20-bit displacement [base + idx + imm]. bool SystemZDAGToDAGISel::SelectAddrRRI(SDValue Op, SDValue Addr, - SDValue &Base, SDValue &Index, SDValue &Disp) { + SDValue &Base, SDValue &Disp, SDValue &Index) { SystemZRRIAddressMode AM; bool Done = false; @@ -417,7 +417,7 @@ bool SystemZDAGToDAGISel::SelectAddrRRI(SDValue Op, SDValue Addr, /// SelectLAAddr - it calls SelectAddr and determines if the maximal addressing /// mode it matches can be cost effectively emitted as an LA/LAY instruction. bool SystemZDAGToDAGISel::SelectLAAddr(SDValue Op, SDValue Addr, - SDValue &Base, SDValue &Index, SDValue &Disp) { + SDValue &Base, SDValue &Disp, SDValue &Index) { SystemZRRIAddressMode AM; if (MatchAddress(Addr, AM)) |