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authorRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-08-23 11:36:42 +0000
committerRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-08-23 11:36:42 +0000
commita550b51bac50493db75a7b5788a3f2c3b62fd913 (patch)
tree234c55a16d594496ca2d4c1f257bbbc90c8035bd /lib/Target/SystemZ/SystemZISelLowering.h
parent35c93e4e42d7a35a90e89211fa62f478e25ba0a4 (diff)
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[SystemZ] Add basic prefetch support
Just the instructions and intrinsics for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189100 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/SystemZ/SystemZISelLowering.h')
-rw-r--r--lib/Target/SystemZ/SystemZISelLowering.h8
1 files changed, 7 insertions, 1 deletions
diff --git a/lib/Target/SystemZ/SystemZISelLowering.h b/lib/Target/SystemZ/SystemZISelLowering.h
index 604453d..f6a2ce0 100644
--- a/lib/Target/SystemZ/SystemZISelLowering.h
+++ b/lib/Target/SystemZ/SystemZISelLowering.h
@@ -132,7 +132,12 @@ namespace SystemZISD {
// operand into the high bits
// Operand 4: the negative of operand 2, for rotating the other way
// Operand 5: the width of the field in bits (8 or 16)
- ATOMIC_CMP_SWAPW
+ ATOMIC_CMP_SWAPW,
+
+ // Prefetch from the second operand using the 4-bit control code in
+ // the first operand. The code is 1 for a load prefetch and 2 for
+ // a store prefetch.
+ PREFETCH
};
}
@@ -225,6 +230,7 @@ private:
SDValue lowerATOMIC_CMP_SWAP(SDValue Op, SelectionDAG &DAG) const;
SDValue lowerSTACKSAVE(SDValue Op, SelectionDAG &DAG) const;
SDValue lowerSTACKRESTORE(SDValue Op, SelectionDAG &DAG) const;
+ SDValue lowerPREFETCH(SDValue Op, SelectionDAG &DAG) const;
// If the last instruction before MBBI in MBB was some form of COMPARE,
// try to replace it with a COMPARE AND BRANCH just before MBBI.