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authorRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-05-22 13:38:45 +0000
committerRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-05-22 13:38:45 +0000
commitdbd8eb26ce1e7de9b69f5c46f45ba011a706c9b9 (patch)
tree5b35eaee1a1f40aa0654e6ca60a910893ab15cfc /lib/Target/SystemZ/SystemZInstrFormats.td
parentd34c40514e716acbce22befd14f4d659a91fcaf2 (diff)
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[SystemZ] Rename PSW to CC
Addresses a review comment from Ulrich Weigand. No functional change intended. I'm not sure whether the old TODO that this patch touches still holds, but that's something we'd get to when adding a targetted scheduling description. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182474 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/SystemZ/SystemZInstrFormats.td')
-rw-r--r--lib/Target/SystemZ/SystemZInstrFormats.td12
1 files changed, 6 insertions, 6 deletions
diff --git a/lib/Target/SystemZ/SystemZInstrFormats.td b/lib/Target/SystemZ/SystemZInstrFormats.td
index bf5aa8d..a9bc562 100644
--- a/lib/Target/SystemZ/SystemZInstrFormats.td
+++ b/lib/Target/SystemZ/SystemZInstrFormats.td
@@ -913,10 +913,10 @@ class SelectWrapper<RegisterOperand cls>
[(set cls:$dst, (z_select_ccmask cls:$src1, cls:$src2, imm:$cc))]> {
let usesCustomInserter = 1;
// Although the instructions used by these nodes do not in themselves
- // change the PSW, the insertion requires new blocks, and the PSW cannot
- // be live across them.
- let Defs = [PSW];
- let Uses = [PSW];
+ // change CC, the insertion requires new blocks, and CC cannot be live
+ // across them.
+ let Defs = [CC];
+ let Uses = [CC];
}
// OPERATOR is ATOMIC_SWAP or an ATOMIC_LOAD_* operation. PAT and OPERAND
@@ -925,7 +925,7 @@ class AtomicLoadBinary<SDPatternOperator operator, RegisterOperand cls,
dag pat, DAGOperand operand>
: Pseudo<(outs cls:$dst), (ins bdaddr20only:$ptr, operand:$src2),
[(set cls:$dst, (operator bdaddr20only:$ptr, pat))]> {
- let Defs = [PSW];
+ let Defs = [CC];
let Has20BitOffset = 1;
let mayLoad = 1;
let mayStore = 1;
@@ -951,7 +951,7 @@ class AtomicLoadWBinary<SDPatternOperator operator, dag pat,
ADDR32:$negbitshift, uimm32:$bitsize),
[(set GR32:$dst, (operator bdaddr20only:$ptr, pat, ADDR32:$bitshift,
ADDR32:$negbitshift, uimm32:$bitsize))]> {
- let Defs = [PSW];
+ let Defs = [CC];
let Has20BitOffset = 1;
let mayLoad = 1;
let mayStore = 1;