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authorRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-07-09 09:46:39 +0000
committerRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-07-09 09:46:39 +0000
commit2e015ef9bb40e5d9f98db9a9509b9986873089ea (patch)
treeb728ba79dcd6a132edb728055829e0bb6dce5d40 /lib/Target/SystemZ/SystemZInstrInfo.td
parentf6ea5e0d8007234fc74c1ff6ac2c3ca316c41d92 (diff)
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[SystemZ] Use MVC for simple load/store pairs
Look for patterns of the form (store (load ...), ...) in which the two locations are known not to partially overlap. (Identical locations are OK.) These sequences are better implemented by MVC unless either the load or the store could use RELATIVE LONG instructions. The testcase showed that we weren't using LHRL and LGHRL for extload16, only sextloadi16. The patch fixes that too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185919 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/SystemZ/SystemZInstrInfo.td')
-rw-r--r--lib/Target/SystemZ/SystemZInstrInfo.td22
1 files changed, 22 insertions, 0 deletions
diff --git a/lib/Target/SystemZ/SystemZInstrInfo.td b/lib/Target/SystemZ/SystemZInstrInfo.td
index b4e5c25..5e13c7f 100644
--- a/lib/Target/SystemZ/SystemZInstrInfo.td
+++ b/lib/Target/SystemZ/SystemZInstrInfo.td
@@ -294,6 +294,20 @@ let mayLoad = 1, mayStore = 1, usesCustomInserter = 1 in
[(z_mvc bdaddr12only:$dest, bdaddr12only:$src,
imm32len8:$length)]>;
+defm LoadStore8_32 : MVCLoadStore<anyextloadi8, truncstorei8, i32,
+ MVCWrapper, 1>;
+defm LoadStore16_32 : MVCLoadStore<anyextloadi16, truncstorei16, i32,
+ MVCWrapper, 2>;
+defm LoadStore32_32 : MVCLoadStore<load, store, i32, MVCWrapper, 4>;
+
+defm LoadStore8 : MVCLoadStore<anyextloadi8, truncstorei8, i64,
+ MVCWrapper, 1>;
+defm LoadStore16 : MVCLoadStore<anyextloadi16, truncstorei16, i64,
+ MVCWrapper, 2>;
+defm LoadStore32 : MVCLoadStore<anyextloadi32, truncstorei32, i64,
+ MVCWrapper, 4>;
+defm LoadStore64 : MVCLoadStore<load, store, i64, MVCWrapper, 8>;
+
//===----------------------------------------------------------------------===//
// Sign extensions
//===----------------------------------------------------------------------===//
@@ -339,6 +353,14 @@ def : Pat<(i64 (extloadi8 bdxaddr20only:$src)), (LGB bdxaddr20only:$src)>;
def : Pat<(i64 (extloadi16 bdxaddr20only:$src)), (LGH bdxaddr20only:$src)>;
def : Pat<(i64 (extloadi32 bdxaddr20only:$src)), (LGF bdxaddr20only:$src)>;
+// We want PC-relative addresses to be tried ahead of BD and BDX addresses.
+// However, BDXs have two extra operands and are therefore 6 units more
+// complex.
+let AddedComplexity = 7 in {
+ def : Pat<(i32 (extloadi16 pcrel32:$src)), (LHRL pcrel32:$src)>;
+ def : Pat<(i64 (extloadi16 pcrel32:$src)), (LGHRL pcrel32:$src)>;
+}
+
//===----------------------------------------------------------------------===//
// Zero extensions
//===----------------------------------------------------------------------===//