diff options
author | Stephen Hines <srhines@google.com> | 2014-07-21 00:45:20 -0700 |
---|---|---|
committer | Stephen Hines <srhines@google.com> | 2014-07-25 00:48:57 -0700 |
commit | cd81d94322a39503e4a3e87b6ee03d4fcb3465fb (patch) | |
tree | 81b7dd2bb4370a392f31d332a566c903b5744764 /lib/Target/SystemZ/SystemZOperands.td | |
parent | 0c5f13c0c4499eaf42ab5e9e2ceabd4e20e36861 (diff) | |
download | external_llvm-cd81d94322a39503e4a3e87b6ee03d4fcb3465fb.zip external_llvm-cd81d94322a39503e4a3e87b6ee03d4fcb3465fb.tar.gz external_llvm-cd81d94322a39503e4a3e87b6ee03d4fcb3465fb.tar.bz2 |
Update LLVM for rebase to r212749.
Includes a cherry-pick of:
r212948 - fixes a small issue with atomic calls
Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
Diffstat (limited to 'lib/Target/SystemZ/SystemZOperands.td')
-rw-r--r-- | lib/Target/SystemZ/SystemZOperands.td | 29 |
1 files changed, 11 insertions, 18 deletions
diff --git a/lib/Target/SystemZ/SystemZOperands.td b/lib/Target/SystemZ/SystemZOperands.td index 3ad146c..7be81dc 100644 --- a/lib/Target/SystemZ/SystemZOperands.td +++ b/lib/Target/SystemZ/SystemZOperands.td @@ -202,21 +202,6 @@ def S32Imm : ImmediateAsmOperand<"S32Imm">; def U32Imm : ImmediateAsmOperand<"U32Imm">; //===----------------------------------------------------------------------===// -// 8-bit immediates -//===----------------------------------------------------------------------===// - -def uimm8zx4 : Immediate<i8, [{ - return isUInt<4>(N->getZExtValue()); -}], NOOP_SDNodeXForm, "U4Imm">; - -def uimm8zx6 : Immediate<i8, [{ - return isUInt<6>(N->getZExtValue()); -}], NOOP_SDNodeXForm, "U6Imm">; - -def simm8 : Immediate<i8, [{}], SIMM8, "S8Imm">; -def uimm8 : Immediate<i8, [{}], UIMM8, "U8Imm">; - -//===----------------------------------------------------------------------===// // i32 immediates //===----------------------------------------------------------------------===// @@ -241,6 +226,14 @@ def imm32lh16c : Immediate<i32, [{ }], LH16, "U16Imm">; // Short immediates +def imm32zx4 : Immediate<i32, [{ + return isUInt<4>(N->getZExtValue()); +}], NOOP_SDNodeXForm, "U4Imm">; + +def imm32zx6 : Immediate<i32, [{ + return isUInt<6>(N->getZExtValue()); +}], NOOP_SDNodeXForm, "U6Imm">; + def imm32sx8 : Immediate<i32, [{ return isInt<8>(N->getSExtValue()); }], SIMM8, "S8Imm">; @@ -470,13 +463,13 @@ def AccessReg : AsmOperandClass { let Name = "AccessReg"; let ParserMethod = "parseAccessReg"; } -def access_reg : Immediate<i8, [{ return N->getZExtValue() < 16; }], +def access_reg : Immediate<i32, [{ return N->getZExtValue() < 16; }], NOOP_SDNodeXForm, "AccessReg"> { let ParserMatchClass = AccessReg; } // A 4-bit condition-code mask. -def cond4 : PatLeaf<(i8 imm), [{ return (N->getZExtValue() < 16); }]>, - Operand<i8> { +def cond4 : PatLeaf<(i32 imm), [{ return (N->getZExtValue() < 16); }]>, + Operand<i32> { let PrintMethod = "printCond4Operand"; } |