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| author | Anton Korobeynikov <asl@math.spbu.ru> | 2009-07-16 13:43:40 +0000 |
|---|---|---|
| committer | Anton Korobeynikov <asl@math.spbu.ru> | 2009-07-16 13:43:40 +0000 |
| commit | 4cad7d29fc65c22ff5b4147000368e88ec77c5b9 (patch) | |
| tree | 66a26dcf355d5af9da8e3db577488efea4af7244 /lib/Target/SystemZ/SystemZRegisterInfo.td | |
| parent | 9e4816e09f50e3c4ef7368a188966944b8167ab4 (diff) | |
| download | external_llvm-4cad7d29fc65c22ff5b4147000368e88ec77c5b9.zip external_llvm-4cad7d29fc65c22ff5b4147000368e88ec77c5b9.tar.gz external_llvm-4cad7d29fc65c22ff5b4147000368e88ec77c5b9.tar.bz2 | |
Change register allocation order, so R0 will be allocated the last among scratch. This will make address-calculation code much more happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75928 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/SystemZ/SystemZRegisterInfo.td')
| -rw-r--r-- | lib/Target/SystemZ/SystemZRegisterInfo.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/SystemZ/SystemZRegisterInfo.td b/lib/Target/SystemZ/SystemZRegisterInfo.td index 5ac3452..0dc0bbd 100644 --- a/lib/Target/SystemZ/SystemZRegisterInfo.td +++ b/lib/Target/SystemZ/SystemZRegisterInfo.td @@ -103,7 +103,7 @@ def subreg_32bit : PatLeaf<(i32 1)>; /// Register classes def GR32 : RegisterClass<"SystemZ", [i32], 32, // Volatile registers - [R0W, R1W, R2W, R3W, R4W, R5W, R6W, R7W, R8W, R9W, R10W, R12W, R13W, + [R1W, R2W, R3W, R4W, R5W, R0W, R6W, R7W, R8W, R9W, R10W, R12W, R13W, // Frame pointer, sometimes allocable R11W, // Volatile, but not allocable @@ -156,7 +156,7 @@ def ADDR32 : RegisterClass<"SystemZ", [i32], 32, def GR64 : RegisterClass<"SystemZ", [i64], 64, // Volatile registers - [R0D, R1D, R2D, R3D, R4D, R5D, R6D, R7D, R8D, R9D, R10D, R12D, R13D, + [R1D, R2D, R3D, R4D, R5D, R0D, R6D, R7D, R8D, R9D, R10D, R12D, R13D, // Frame pointer, sometimes allocable R11D, // Volatile, but not allocable |