diff options
| author | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-07-12 09:08:12 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-07-12 09:08:12 +0000 |
| commit | 5e009541973b7935386055066689902aa7134e2d (patch) | |
| tree | acfabe0cedf94afd85f196a8e6df8181829d1167 /lib/Target/SystemZ/SystemZRegisterInfo.td | |
| parent | 6cf3cfa0ab1da0c52730fec103bbc69eb0370081 (diff) | |
| download | external_llvm-5e009541973b7935386055066689902aa7134e2d.zip external_llvm-5e009541973b7935386055066689902aa7134e2d.tar.gz external_llvm-5e009541973b7935386055066689902aa7134e2d.tar.bz2 | |
[SystemZ] Fix parsing of inline asm registers
GPR and FPR constraints like "{r2}" and "{f2}" weren't handled correctly
because the name-to-regno mapping depends on the value type and
(because of that) the internal names in RegStrings are not the
same as the AsmName.
CC constraints like "{cc}" didn't work either because there was no
associated register class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186148 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/SystemZ/SystemZRegisterInfo.td')
| -rw-r--r-- | lib/Target/SystemZ/SystemZRegisterInfo.td | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/lib/Target/SystemZ/SystemZRegisterInfo.td b/lib/Target/SystemZ/SystemZRegisterInfo.td index d65553e..ffffe72 100644 --- a/lib/Target/SystemZ/SystemZRegisterInfo.td +++ b/lib/Target/SystemZ/SystemZRegisterInfo.td @@ -147,5 +147,7 @@ defm FP128 : SystemZRegClass<"FP128", f128, 128, (add F0Q, F1Q, F4Q, F5Q, // Other registers //===----------------------------------------------------------------------===// -// The 2-bit condition code field of the PSW. +// The 2-bit condition code field of the PSW. Every register named in an +// inline asm needs a class associated with it. def CC : SystemZReg<"cc">; +def CCRegs : RegisterClass<"SystemZ", [i32], 32, (add CC)>; |