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author | Andrew Trick <atrick@apple.com> | 2013-09-26 05:53:35 +0000 |
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committer | Andrew Trick <atrick@apple.com> | 2013-09-26 05:53:35 +0000 |
commit | b6ac11cd03e9dd97b45dc97787171f942ef8e344 (patch) | |
tree | c3a5445d795ffac70245f791c111588b6d3703ee /lib/Target/TargetSubtargetInfo.cpp | |
parent | 7394a7c0c27d498fe7ff0760eeefdb83bb54a795 (diff) | |
download | external_llvm-b6ac11cd03e9dd97b45dc97787171f942ef8e344.zip external_llvm-b6ac11cd03e9dd97b45dc97787171f942ef8e344.tar.gz external_llvm-b6ac11cd03e9dd97b45dc97787171f942ef8e344.tar.bz2 |
Added temp flag -misched-bench for staging in default changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191423 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/TargetSubtargetInfo.cpp')
-rw-r--r-- | lib/Target/TargetSubtargetInfo.cpp | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/lib/Target/TargetSubtargetInfo.cpp b/lib/Target/TargetSubtargetInfo.cpp index f624c32..10e8db5 100644 --- a/lib/Target/TargetSubtargetInfo.cpp +++ b/lib/Target/TargetSubtargetInfo.cpp @@ -11,6 +11,7 @@ // //===----------------------------------------------------------------------===// +#include "llvm/Support/CommandLine.h" #include "llvm/Target/TargetSubtargetInfo.h" #include "llvm/ADT/SmallVector.h" using namespace llvm; @@ -22,6 +23,21 @@ TargetSubtargetInfo::TargetSubtargetInfo() {} TargetSubtargetInfo::~TargetSubtargetInfo() {} +// Temporary option to compare overall performance change when moving from the +// SD scheduler to the MachineScheduler pass pipeline. It should be removed +// before 3.4. The normal way to enable/disable the MachineScheduling pass +// itself is by using -enable-misched. For targets that already use MI sched +// (via MySubTarget::enableMachineScheduler()) -misched-bench=false negates the +// subtarget hook. +static cl::opt<bool> BenchMachineSched("misched-bench", cl::Hidden, + cl::desc("Migrate from the target's default SD scheduler to MI scheduler")); + +bool TargetSubtargetInfo::useMachineScheduler() const { + if (BenchMachineSched.getNumOccurrences()) + return BenchMachineSched; + return enableMachineScheduler(); +} + bool TargetSubtargetInfo::enableMachineScheduler() const { return false; } @@ -38,4 +54,3 @@ bool TargetSubtargetInfo::enablePostRAScheduler( bool TargetSubtargetInfo::useAA() const { return false; } - |