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| author | Evan Cheng <evan.cheng@apple.com> | 2011-06-24 01:44:41 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2011-06-24 01:44:41 +0000 |
| commit | a347f85dbeee37a7f2bb68df1a7d4cdfbb7b576d (patch) | |
| tree | 843b1f6be5ffffef461ce063cf5468368598d40e /lib/Target/X86/Makefile | |
| parent | 66dddd1da3e036d05f94df82221a97b7d26e3498 (diff) | |
| download | external_llvm-a347f85dbeee37a7f2bb68df1a7d4cdfbb7b576d.zip external_llvm-a347f85dbeee37a7f2bb68df1a7d4cdfbb7b576d.tar.gz external_llvm-a347f85dbeee37a7f2bb68df1a7d4cdfbb7b576d.tar.bz2 | |
Starting to refactor Target to separate out code that's needed to fully describe
target machine from those that are only needed by codegen. The goal is to
sink the essential target description into MC layer so we can start building
MC based tools without needing to link in the entire codegen.
First step is to refactor TargetRegisterInfo. This patch added a base class
MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to
separate register description from the rest of the stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133782 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/Makefile')
| -rw-r--r-- | lib/Target/X86/Makefile | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/lib/Target/X86/Makefile b/lib/Target/X86/Makefile index 12fb090..9cd17ee 100644 --- a/lib/Target/X86/Makefile +++ b/lib/Target/X86/Makefile @@ -12,14 +12,15 @@ LIBRARYNAME = LLVMX86CodeGen TARGET = X86 # Make sure that tblgen is run, first thing. -BUILT_SOURCES = X86GenRegisterInfo.h.inc X86GenRegisterNames.inc \ - X86GenRegisterInfo.inc X86GenInstrNames.inc \ - X86GenInstrInfo.inc X86GenAsmWriter.inc X86GenAsmMatcher.inc \ +BUILT_SOURCES = X86GenRegisterNames.inc X86GenRegisterDesc.inc \ + X86GenRegisterInfo.h.inc X86GenRegisterInfo.inc \ + X86GenInstrNames.inc X86GenInstrInfo.inc \ + X86GenAsmWriter.inc X86GenAsmMatcher.inc \ X86GenAsmWriter1.inc X86GenDAGISel.inc \ X86GenDisassemblerTables.inc X86GenFastISel.inc \ X86GenCallingConv.inc X86GenSubtarget.inc \ X86GenEDInfo.inc -DIRS = InstPrinter AsmParser Disassembler TargetInfo Utils +DIRS = InstPrinter AsmParser Disassembler TargetInfo TargetDesc Utils include $(LEVEL)/Makefile.common |