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author | Chris Lattner <sabre@nondot.org> | 2003-08-11 14:59:22 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2003-08-11 14:59:22 +0000 |
commit | ac0c8680ad53c08189c23f39c79a2147378692df (patch) | |
tree | f853925df2a8e14a96d9e679e5d16c5a8f061576 /lib/Target/X86/Makefile | |
parent | fa7ed53f32917ef632b21753a772548dde8c2eed (diff) | |
download | external_llvm-ac0c8680ad53c08189c23f39c79a2147378692df.zip external_llvm-ac0c8680ad53c08189c23f39c79a2147378692df.tar.gz external_llvm-ac0c8680ad53c08189c23f39c79a2147378692df.tar.bz2 |
Add support for a pattern matching instruction selector. This is still in
the early implementation phases, so it is disabled by default
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7719 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/Makefile')
-rw-r--r-- | lib/Target/X86/Makefile | 25 |
1 files changed, 14 insertions, 11 deletions
diff --git a/lib/Target/X86/Makefile b/lib/Target/X86/Makefile index ff4ab7c..ee4cf8c 100644 --- a/lib/Target/X86/Makefile +++ b/lib/Target/X86/Makefile @@ -5,22 +5,25 @@ include $(LEVEL)/Makefile.common # Make sure that tblgen is run, first thing. $(SourceDepend): X86GenRegisterInfo.h.inc X86GenRegisterNames.inc \ X86GenRegisterInfo.inc X86GenInstrNames.inc \ - X86GenInstrInfo.inc + X86GenInstrInfo.inc X86GenInstrSelector.inc -X86GenRegisterNames.inc: X86.td X86RegisterInfo.td $(TBLGEN) - $(TBLGEN) X86.td -gen-register-enums -o $@ +X86GenRegisterNames.inc: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN) + $(TBLGEN) $< -gen-register-enums -o $@ -X86GenRegisterInfo.h.inc: X86.td X86RegisterInfo.td $(TBLGEN) - $(TBLGEN) X86.td -gen-register-desc-header -o $@ +X86GenRegisterInfo.h.inc: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN) + $(TBLGEN) $< -gen-register-desc-header -o $@ -X86GenRegisterInfo.inc: X86.td X86RegisterInfo.td $(TBLGEN) - $(TBLGEN) X86.td -gen-register-desc -o $@ +X86GenRegisterInfo.inc: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN) + $(TBLGEN) $< -gen-register-desc -o $@ -X86GenInstrNames.inc: X86.td X86InstrInfo.td $(TBLGEN) - $(TBLGEN) X86.td -gen-instr-enums -o $@ +X86GenInstrNames.inc: X86.td X86InstrInfo.td ../Target.td $(TBLGEN) + $(TBLGEN) $< -gen-instr-enums -o $@ -X86GenInstrInfo.inc: X86.td X86InstrInfo.td $(TBLGEN) - $(TBLGEN) X86.td -gen-instr-desc -o $@ +X86GenInstrInfo.inc: X86.td X86InstrInfo.td ../Target.td $(TBLGEN) + $(TBLGEN) $< -gen-instr-desc -o $@ + +X86GenInstrSelector.inc: X86.td X86InstrInfo.td ../Target.td $(TBLGEN) + $(TBLGEN) $< -gen-instr-selector -o $@ clean:: $(VERB) rm -f *.inc |