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authorChris Lattner <sabre@nondot.org>2004-08-15 23:02:17 +0000
committerChris Lattner <sabre@nondot.org>2004-08-15 23:02:17 +0000
commitf60b91cbe333963c4a077972b3491429815314ee (patch)
tree848a92952cdc7aed6044041bdeb4eb5d93df0fdf /lib/Target/X86/Makefile
parent6a1e0e6c7bd8080ab429817aeeb278f281111f64 (diff)
downloadexternal_llvm-f60b91cbe333963c4a077972b3491429815314ee.zip
external_llvm-f60b91cbe333963c4a077972b3491429815314ee.tar.gz
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Disable the pattern isel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15787 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/Makefile')
-rw-r--r--lib/Target/X86/Makefile9
1 files changed, 4 insertions, 5 deletions
diff --git a/lib/Target/X86/Makefile b/lib/Target/X86/Makefile
index 494b4a1..51208df 100644
--- a/lib/Target/X86/Makefile
+++ b/lib/Target/X86/Makefile
@@ -15,8 +15,7 @@ TARGET = X86
# Make sure that tblgen is run, first thing.
$(SourceDepend): X86GenRegisterInfo.h.inc X86GenRegisterNames.inc \
X86GenRegisterInfo.inc X86GenInstrNames.inc \
- X86GenInstrInfo.inc X86GenAsmWriter.inc \
- X86GenInstrSelector.inc
+ X86GenInstrInfo.inc X86GenAsmWriter.inc
TDFILES = $(SourceDir)/$(TARGET).td $(wildcard $(SourceDir)/*.td) \
$(SourceDir)/../Target.td
@@ -45,9 +44,9 @@ $(TARGET)GenAsmWriter.inc:: $(TDFILES) $(TBLGEN)
@echo "Building $(TARGET).td assembly writer with tblgen"
$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-asm-writer -o $@
-$(TARGET)GenInstrSelector.inc:: $(TDFILES) $(TBLGEN)
- @echo "Building $(TARGET).td instruction selector with tblgen"
- $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-selector -o $@
+#$(TARGET)GenInstrSelector.inc:: $(TDFILES) $(TBLGEN)
+# @echo "Building $(TARGET).td instruction selector with tblgen"
+# $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-selector -o $@
clean::
$(VERB) rm -f *.inc