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| author | Chris Lattner <sabre@nondot.org> | 2010-07-08 23:46:44 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2010-07-08 23:46:44 +0000 |
| commit | 599b531a960833719f607d66c97871f1f5ad12c0 (patch) | |
| tree | 4706d1f82d62567d32ad048a7d6e50a08c56f40e /lib/Target/X86/X86CodeEmitter.cpp | |
| parent | 99cfb69f17ccf6dca7378fe6d1c60758e5cabd1f (diff) | |
| download | external_llvm-599b531a960833719f607d66c97871f1f5ad12c0.zip external_llvm-599b531a960833719f607d66c97871f1f5ad12c0.tar.gz external_llvm-599b531a960833719f607d66c97871f1f5ad12c0.tar.bz2 | |
Change LEA to have 5 operands for its memory operand, just
like all other instructions, even though a segment is not
allowed. This resolves a bunch of gross hacks in the
encoder and makes LEA more consistent with the rest of the
instruction set.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107934 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86CodeEmitter.cpp')
| -rw-r--r-- | lib/Target/X86/X86CodeEmitter.cpp | 8 |
1 files changed, 1 insertions, 7 deletions
diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp index d6aacd7..f13669b 100644 --- a/lib/Target/X86/X86CodeEmitter.cpp +++ b/lib/Target/X86/X86CodeEmitter.cpp @@ -750,13 +750,7 @@ void Emitter<CodeEmitter>::emitInstruction(const MachineInstr &MI, break; case X86II::MRMSrcMem: { - // FIXME: Maybe lea should have its own form? - int AddrOperands; - if (Opcode == X86::LEA64r || Opcode == X86::LEA64_32r || - Opcode == X86::LEA16r || Opcode == X86::LEA32r) - AddrOperands = X86::AddrNumOperands - 1; // No segment register - else - AddrOperands = X86::AddrNumOperands; + int AddrOperands = X86::AddrNumOperands; intptr_t PCAdj = (CurOp + AddrOperands + 1 != NumOps) ? X86II::getSizeOfImm(Desc->TSFlags) : 0; |