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| author | Nadav Rotem <nrotem@apple.com> | 2013-08-21 05:03:10 +0000 |
|---|---|---|
| committer | Nadav Rotem <nrotem@apple.com> | 2013-08-21 05:03:10 +0000 |
| commit | ec7b5e9290bc0e1b266525a4757773e9ab87847e (patch) | |
| tree | 9900cd6869669c3d1c19e102e4f741b4808bf142 /lib/Target/X86/X86CodeEmitter.cpp | |
| parent | 9397683e629c7aebf27dcdeec05c1c7dceb0f129 (diff) | |
| download | external_llvm-ec7b5e9290bc0e1b266525a4757773e9ab87847e.zip external_llvm-ec7b5e9290bc0e1b266525a4757773e9ab87847e.tar.gz external_llvm-ec7b5e9290bc0e1b266525a4757773e9ab87847e.tar.bz2 | |
In LLVM FMA3 operands are dst, src1, src2, src3, however dst is not encoded as it is always src1. This was causing the encoding of the operands to be off by one.
Patch by Chris Bieneman.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188866 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86CodeEmitter.cpp')
| -rw-r--r-- | lib/Target/X86/X86CodeEmitter.cpp | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp index 5d72b44..0f9c562 100644 --- a/lib/Target/X86/X86CodeEmitter.cpp +++ b/lib/Target/X86/X86CodeEmitter.cpp @@ -985,8 +985,14 @@ void Emitter<CodeEmitter>::emitVEXOpcodePrefix(uint64_t TSFlags, if (X86II::isX86_64ExtendedReg(MI.getOperand(0).getReg())) VEX_R = 0x0; - if (HasVEX_4V) - VEX_4V = getVEXRegisterEncoding(MI, 1); + if (HasVEX_4V) { + if (HasMemOp4) + VEX_4V = getVEXRegisterEncoding(MI, 1); + else + // FMA3 instructions operands are dst, src1, src2, src3 + // dst and src1 are the same and not encoded separately + VEX_4V = getVEXRegisterEncoding(MI, 2); + } if (X86II::isX86_64ExtendedReg( MI.getOperand(MemOperand+X86::AddrBaseReg).getReg())) |