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| author | Derek Schuff <dschuff@google.com> | 2013-04-18 17:41:08 +0000 |
|---|---|---|
| committer | Derek Schuff <dschuff@google.com> | 2013-04-18 17:41:08 +0000 |
| commit | 2061dcf0e4266c487185f1b3d8e23b93e2dd68fb (patch) | |
| tree | f8fae2e562fa6d2839d321e4a7481e6724d746cc /lib/Target/X86/X86FastISel.cpp | |
| parent | a3fb330d05e85107d01ecf133355d0c6a88196fd (diff) | |
| download | external_llvm-2061dcf0e4266c487185f1b3d8e23b93e2dd68fb.zip external_llvm-2061dcf0e4266c487185f1b3d8e23b93e2dd68fb.tar.gz external_llvm-2061dcf0e4266c487185f1b3d8e23b93e2dd68fb.tar.bz2 | |
Allow misaligned stores in x86 fast-isel.
In X86FastISel::X86SelectStore(), improperly aligned stores are rejected and
handled by the DAG-based ISel. However, X86FastISel::X86SelectLoad() makes
no such requirement. There doesn't appear to be an x86 architectural
correctness issue with allowing potentially unaligned store instructions.
This patch removes this restriction.
Patch by Jim Stichnot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179774 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86FastISel.cpp')
| -rw-r--r-- | lib/Target/X86/X86FastISel.cpp | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp index 6884c92..3511ff1 100644 --- a/lib/Target/X86/X86FastISel.cpp +++ b/lib/Target/X86/X86FastISel.cpp @@ -693,11 +693,6 @@ bool X86FastISel::X86SelectStore(const Instruction *I) { if (S->isAtomic()) return false; - unsigned SABIAlignment = - TD.getABITypeAlignment(S->getValueOperand()->getType()); - if (S->getAlignment() != 0 && S->getAlignment() < SABIAlignment) - return false; - MVT VT; if (!isTypeLegal(I->getOperand(0)->getType(), VT, /*AllowI1=*/true)) return false; |