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author | Reid Spencer <rspencer@reidspencer.com> | 2006-11-02 20:25:50 +0000 |
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committer | Reid Spencer <rspencer@reidspencer.com> | 2006-11-02 20:25:50 +0000 |
commit | 3ed469ccd7b028a030b550d84b7336d146f5d8fa (patch) | |
tree | 66c6b892b6330e9e2eacb4a2c4e4dacf078ee216 /lib/Target/X86/X86ISelLowering.cpp | |
parent | ef42a01113a1ee8ef0f2c803ec05a5f20eca2854 (diff) | |
download | external_llvm-3ed469ccd7b028a030b550d84b7336d146f5d8fa.zip external_llvm-3ed469ccd7b028a030b550d84b7336d146f5d8fa.tar.gz external_llvm-3ed469ccd7b028a030b550d84b7336d146f5d8fa.tar.bz2 |
For PR786:
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31380 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86ISelLowering.cpp')
-rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 10 |
1 files changed, 3 insertions, 7 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 92bec91..ac7327f 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -532,7 +532,6 @@ SDOperand X86TargetLowering::LowerCCCArguments(SDOperand Op, SelectionDAG &DAG) SDOperand X86TargetLowering::LowerCCCCallTo(SDOperand Op, SelectionDAG &DAG) { SDOperand Chain = Op.getOperand(0); unsigned CallingConv= cast<ConstantSDNode>(Op.getOperand(1))->getValue(); - bool isVarArg = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0; bool isTailCall = cast<ConstantSDNode>(Op.getOperand(3))->getValue() != 0; SDOperand Callee = Op.getOperand(4); MVT::ValueType RetVT= Op.Val->getValueType(0); @@ -1031,7 +1030,6 @@ X86TargetLowering::LowerX86_64CCCArguments(SDOperand Op, SelectionDAG &DAG) { SDOperand X86TargetLowering::LowerX86_64CCCCallTo(SDOperand Op, SelectionDAG &DAG) { SDOperand Chain = Op.getOperand(0); - unsigned CallingConv= cast<ConstantSDNode>(Op.getOperand(1))->getValue(); bool isVarArg = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0; bool isTailCall = cast<ConstantSDNode>(Op.getOperand(3))->getValue() != 0; SDOperand Callee = Op.getOperand(4); @@ -1528,8 +1526,6 @@ X86TargetLowering::LowerFastCCArguments(SDOperand Op, SelectionDAG &DAG) { SDOperand X86TargetLowering::LowerFastCCCallTo(SDOperand Op, SelectionDAG &DAG, bool isFastCall) { SDOperand Chain = Op.getOperand(0); - unsigned CallingConv= cast<ConstantSDNode>(Op.getOperand(1))->getValue(); - bool isVarArg = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0; bool isTailCall = cast<ConstantSDNode>(Op.getOperand(3))->getValue() != 0; SDOperand Callee = Op.getOperand(4); MVT::ValueType RetVT= Op.Val->getValueType(0); @@ -1549,11 +1545,13 @@ SDOperand X86TargetLowering::LowerFastCCCallTo(SDOperand Op, SelectionDAG &DAG, { X86::AX, X86::DX }, { X86::EAX, X86::EDX } }; +#if 0 static const unsigned FastCallGPRArgRegs[][2] = { { X86::CL, X86::DL }, { X86::CX, X86::DX }, { X86::ECX, X86::EDX } }; +#endif static const unsigned XMMArgRegs[] = { X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3 }; @@ -1906,7 +1904,6 @@ SDOperand X86TargetLowering::LowerStdCallCCArguments(SDOperand Op, SDOperand X86TargetLowering::LowerStdCallCCCallTo(SDOperand Op, SelectionDAG &DAG) { SDOperand Chain = Op.getOperand(0); - unsigned CallingConv= cast<ConstantSDNode>(Op.getOperand(1))->getValue(); bool isVarArg = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0; bool isTailCall = cast<ConstantSDNode>(Op.getOperand(3))->getValue() != 0; SDOperand Callee = Op.getOperand(4); @@ -2841,7 +2838,7 @@ static bool isSplatMask(SDNode *N) { unsigned i = 0; for (; i != NumElems; ++i) { SDOperand Elt = N->getOperand(i); - if (ConstantSDNode *EltV = dyn_cast<ConstantSDNode>(Elt)) { + if (isa<ConstantSDNode>(Elt)) { ElementBase = Elt; break; } @@ -5431,7 +5428,6 @@ static SDOperand PerformSELECTCombine(SDNode *N, SelectionDAG &DAG, SDOperand X86TargetLowering::PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const { - TargetMachine &TM = getTargetMachine(); SelectionDAG &DAG = DCI.DAG; switch (N->getOpcode()) { default: break; |