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author | Chris Lattner <sabre@nondot.org> | 2010-12-05 07:49:54 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2010-12-05 07:49:54 +0000 |
commit | 9637d5b22ec655d9b2f6cdb5fb23b0ce0ec9c8a5 (patch) | |
tree | d6a13f219ef8586ab4e90dc307244aeedf94f3e4 /lib/Target/X86/X86ISelLowering.cpp | |
parent | b20e0b1fddfd9099e12b84a71fbc8ccff5a12b10 (diff) | |
download | external_llvm-9637d5b22ec655d9b2f6cdb5fb23b0ce0ec9c8a5.zip external_llvm-9637d5b22ec655d9b2f6cdb5fb23b0ce0ec9c8a5.tar.gz external_llvm-9637d5b22ec655d9b2f6cdb5fb23b0ce0ec9c8a5.tar.bz2 |
Teach X86ISelLowering that the second result of X86ISD::UMUL is a flags
result. This allows us to compile:
void *test12(long count) {
return new int[count];
}
into:
test12:
movl $4, %ecx
movq %rdi, %rax
mulq %rcx
movq $-1, %rdi
cmovnoq %rax, %rdi
jmp __Znam ## TAILCALL
instead of:
test12:
movl $4, %ecx
movq %rdi, %rax
mulq %rcx
seto %cl
testb %cl, %cl
movq $-1, %rdi
cmoveq %rax, %rdi
jmp __Znam
Of course it would be even better if the regalloc inverted the cmov to 'cmovoq',
which would eliminate the need for the 'movq %rdi, %rax'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120936 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86ISelLowering.cpp')
-rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 58b8cb1..6e1420c 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -7207,6 +7207,9 @@ static bool isX86LogicalCmp(SDValue Op) { Opc == X86ISD::AND)) return true; + if (Op.getResNo() == 2 && Opc == X86ISD::UMUL) + return true; + return false; } |