aboutsummaryrefslogtreecommitdiffstats
path: root/lib/Target/X86/X86ISelLowering.cpp
diff options
context:
space:
mode:
authorCraig Topper <craig.topper@gmail.com>2013-08-14 06:21:10 +0000
committerCraig Topper <craig.topper@gmail.com>2013-08-14 06:21:10 +0000
commitd36b53e764b742c2ba16ae2b2517646694e05bff (patch)
treef21e72a388e09b200cc8e9787ff3e015149413c2 /lib/Target/X86/X86ISelLowering.cpp
parentcc60bbc739bf4459eae7f2a6f0feb5534dd99f46 (diff)
downloadexternal_llvm-d36b53e764b742c2ba16ae2b2517646694e05bff.zip
external_llvm-d36b53e764b742c2ba16ae2b2517646694e05bff.tar.gz
external_llvm-d36b53e764b742c2ba16ae2b2517646694e05bff.tar.bz2
Replace EVT with MVT in isVectorShift. Keeps compiler from generating unneeded checks and handling for extended types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188362 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86ISelLowering.cpp')
-rw-r--r--lib/Target/X86/X86ISelLowering.cpp8
1 files changed, 5 insertions, 3 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 80ef332..f73689d 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -5076,7 +5076,8 @@ bool isShuffleMaskConsecutive(ShuffleVectorSDNode *SVOp,
/// logical left shift of a vector.
static bool isVectorShiftRight(ShuffleVectorSDNode *SVOp, SelectionDAG &DAG,
bool &isLeft, SDValue &ShVal, unsigned &ShAmt) {
- unsigned NumElems = SVOp->getValueType(0).getVectorNumElements();
+ unsigned NumElems =
+ SVOp->getValueType(0).getSimpleVT().getVectorNumElements();
unsigned NumZeros = getNumOfConsecutiveZeros(
SVOp, NumElems, false /* check zeros from right */, DAG,
SVOp->getMaskElt(0));
@@ -5110,7 +5111,8 @@ static bool isVectorShiftRight(ShuffleVectorSDNode *SVOp, SelectionDAG &DAG,
/// logical left shift of a vector.
static bool isVectorShiftLeft(ShuffleVectorSDNode *SVOp, SelectionDAG &DAG,
bool &isLeft, SDValue &ShVal, unsigned &ShAmt) {
- unsigned NumElems = SVOp->getValueType(0).getVectorNumElements();
+ unsigned NumElems =
+ SVOp->getValueType(0).getSimpleVT().getVectorNumElements();
unsigned NumZeros = getNumOfConsecutiveZeros(
SVOp, NumElems, true /* check zeros from left */, DAG,
NumElems - SVOp->getMaskElt(NumElems - 1) - 1);
@@ -5146,7 +5148,7 @@ static bool isVectorShift(ShuffleVectorSDNode *SVOp, SelectionDAG &DAG,
bool &isLeft, SDValue &ShVal, unsigned &ShAmt) {
// Although the logic below support any bitwidth size, there are no
// shift instructions which handle more than 128-bit vectors.
- if (!SVOp->getValueType(0).is128BitVector())
+ if (!SVOp->getValueType(0).getSimpleVT().is128BitVector())
return false;
if (isVectorShiftLeft(SVOp, DAG, isLeft, ShVal, ShAmt) ||