diff options
author | Rafael Espindola <rafael.espindola@gmail.com> | 2010-11-28 21:16:39 +0000 |
---|---|---|
committer | Rafael Espindola <rafael.espindola@gmail.com> | 2010-11-28 21:16:39 +0000 |
commit | d652dbe72044b07a681b579a0a938c613ef15ae8 (patch) | |
tree | 4572a05949cbf147dea5e70376db5ca680e15248 /lib/Target/X86/X86ISelLowering.cpp | |
parent | 695ab519e4129ba1053383364a9241ec4c68904b (diff) | |
download | external_llvm-d652dbe72044b07a681b579a0a938c613ef15ae8.zip external_llvm-d652dbe72044b07a681b579a0a938c613ef15ae8.tar.gz external_llvm-d652dbe72044b07a681b579a0a938c613ef15ae8.tar.bz2 |
Move lowering of TLS_addr32 and TLS_addr64 to X86MCInstLower.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120263 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86ISelLowering.cpp')
-rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 41 |
1 files changed, 0 insertions, 41 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 91768d4..6793b70 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -9923,44 +9923,6 @@ X86TargetLowering::EmitLoweredTLSCall(MachineInstr *MI, } MachineBasicBlock * -X86TargetLowering::emitLoweredTLSAddr(MachineInstr *MI, - MachineBasicBlock *BB) const { - const X86InstrInfo *TII - = static_cast<const X86InstrInfo*>(getTargetMachine().getInstrInfo()); - DebugLoc DL = MI->getDebugLoc(); - if (Subtarget->is64Bit()) { - BuildMI(*BB, MI, DL, TII->get(X86::DATA16_PREFIX)); - MachineInstrBuilder MIB = BuildMI(*BB, MI, DL, TII->get(X86::LEA64r), - X86::RDI); - X86AddressMode Addr; - Addr.GV = MI->getOperand(3).getGlobal(); - Addr.GVOpFlags = MI->getOperand(3).getTargetFlags(); - Addr.Base.Reg = X86::RIP; - addFullAddress(MIB, Addr); - BuildMI(*BB, MI, DL, TII->get(X86::DATA16_PREFIX)); - BuildMI(*BB, MI, DL, TII->get(X86::DATA16_PREFIX)); - BuildMI(*BB, MI, DL, TII->get(X86::REX64_PREFIX)); - BuildMI(*BB, MI, DL, TII->get(X86::CALL64pcrel32)) - .addExternalSymbol("__tls_get_addr", X86II::MO_PLT) - .addReg(X86::RDI, RegState::Implicit); - } else { - MachineInstrBuilder MIB = BuildMI(*BB, MI, DL, TII->get(X86::LEA32r), - X86::EAX); - X86AddressMode Addr; - Addr.GV = MI->getOperand(3).getGlobal(); - Addr.GVOpFlags = MI->getOperand(3).getTargetFlags(); - Addr.IndexReg = X86::EBX; - addFullAddress(MIB, Addr); - BuildMI(*BB, MI, DL, TII->get(X86::CALLpcrel32)) - .addExternalSymbol("___tls_get_addr", X86II::MO_PLT) - .addReg(X86::EAX, RegState::Implicit); - } - - MI->eraseFromParent(); // The pseudo instruction is gone now. - return BB; -} - -MachineBasicBlock * X86TargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *BB) const { switch (MI->getOpcode()) { @@ -9970,9 +9932,6 @@ X86TargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI, case X86::TLSCall_32: case X86::TLSCall_64: return EmitLoweredTLSCall(MI, BB); - case X86::TLS_addr32: - case X86::TLS_addr64: - return emitLoweredTLSAddr(MI, BB); case X86::CMOV_GR8: case X86::CMOV_FR32: case X86::CMOV_FR64: |