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| author | Chris Lattner <sabre@nondot.org> | 2010-02-23 02:07:48 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2010-02-23 02:07:48 +0000 |
| commit | 8f2b4cc07161b56e56d6615761ea4ba08dc0e7d3 (patch) | |
| tree | 25e3800316d0b439fa97b868cbfa37a694c30db3 /lib/Target/X86/X86ISelLowering.h | |
| parent | 363ac58263dc4ce7c380bbaddb64f90b507fb16d (diff) | |
| download | external_llvm-8f2b4cc07161b56e56d6615761ea4ba08dc0e7d3.zip external_llvm-8f2b4cc07161b56e56d6615761ea4ba08dc0e7d3.tar.gz external_llvm-8f2b4cc07161b56e56d6615761ea4ba08dc0e7d3.tar.bz2 | |
X86InstrInfoSSE.td declares PINSRW as having type v8i16,
don't alis it in the MMX .td file with a different width,
split into two X86ISD opcodes. This fixes an x86 testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96859 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86ISelLowering.h')
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/X86/X86ISelLowering.h b/lib/Target/X86/X86ISelLowering.h index cf0eb40..ffaf1cf 100644 --- a/lib/Target/X86/X86ISelLowering.h +++ b/lib/Target/X86/X86ISelLowering.h @@ -180,7 +180,7 @@ namespace llvm { /// PINSRW - Insert the lower 16-bits of a 32-bit value to a vector, /// corresponds to X86::PINSRW. - PINSRW, + PINSRW, MMX_PINSRW, /// PSHUFB - Shuffle 16 8-bit values within a vector. PSHUFB, |