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| author | Evan Cheng <evan.cheng@apple.com> | 2010-01-11 22:03:29 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2010-01-11 22:03:29 +0000 |
| commit | 199c4240feedec2f9dbd0d4c4c0a32fa46e50270 (patch) | |
| tree | 23f814b690f461e89f44e4455bdfce90fafb6493 /lib/Target/X86/X86Instr64bit.td | |
| parent | c31b0fc31f69435eeb6cd456158239e275f52f31 (diff) | |
| download | external_llvm-199c4240feedec2f9dbd0d4c4c0a32fa46e50270.zip external_llvm-199c4240feedec2f9dbd0d4c4c0a32fa46e50270.tar.gz external_llvm-199c4240feedec2f9dbd0d4c4c0a32fa46e50270.tar.bz2 | |
Extend r93152 to work on OR r, r. If the source set bits are known not to overlap, then select as an ADD instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93191 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86Instr64bit.td')
| -rw-r--r-- | lib/Target/X86/X86Instr64bit.td | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/lib/Target/X86/X86Instr64bit.td b/lib/Target/X86/X86Instr64bit.td index b2aead6..7077cf9 100644 --- a/lib/Target/X86/X86Instr64bit.td +++ b/lib/Target/X86/X86Instr64bit.td @@ -1093,7 +1093,7 @@ let isCommutable = 1 in def OR64rr : RI<0x09, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), "or{q}\t{$src2, $dst|$dst, $src2}", - [(set GR64:$dst, (or GR64:$src1, GR64:$src2)), + [(set GR64:$dst, (or_not_add GR64:$src1, GR64:$src2)), (implicit EFLAGS)]>; def OR64rr_REV : RI<0x0B, MRMSrcReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2), @@ -2125,13 +2125,16 @@ def : Pat<(store (shld (loadi64 addr:$dst), (i8 imm:$amt1), GR64:$src2, (i8 imm:$amt2)), addr:$dst), (SHLD64mri8 addr:$dst, GR64:$src2, (i8 imm:$amt1))>; -// (or x, c) -> (add x, c) if masked bits are known zero. +// (or x1, x2) -> (add x1, x2) if two operands are known not to share bits. def : Pat<(parallel (or_is_add GR64:$src1, i64immSExt8:$src2), (implicit EFLAGS)), (ADD64ri8 GR64:$src1, i64immSExt8:$src2)>; def : Pat<(parallel (or_is_add GR64:$src1, i64immSExt32:$src2), (implicit EFLAGS)), (ADD64ri32 GR64:$src1, i64immSExt32:$src2)>; +def : Pat<(parallel (or_is_add GR64:$src1, GR64:$src2), + (implicit EFLAGS)), + (ADD64rr GR64:$src1, GR64:$src2)>; // X86 specific add which produces a flag. def : Pat<(addc GR64:$src1, GR64:$src2), |