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authorRafael Espindola <rafael.espindola@gmail.com>2010-10-13 13:31:20 +0000
committerRafael Espindola <rafael.espindola@gmail.com>2010-10-13 13:31:20 +0000
commitdba81cf40e5110e6af8cf29dfb63f1d801c9bcaa (patch)
tree3e1a63307ca2b93a5f1bccf6272f8727ed1bc86b /lib/Target/X86/X86InstrCompiler.td
parentb227930cd6850e4c47358e671dbe2cdacb430def (diff)
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Fix PR8365 by adding a more specialized Pat that checks if an 'and' with
8 bit constants can be used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116403 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrCompiler.td')
-rw-r--r--lib/Target/X86/X86InstrCompiler.td21
1 files changed, 18 insertions, 3 deletions
diff --git a/lib/Target/X86/X86InstrCompiler.td b/lib/Target/X86/X86InstrCompiler.td
index 6bfd605..5f13885 100644
--- a/lib/Target/X86/X86InstrCompiler.td
+++ b/lib/Target/X86/X86InstrCompiler.td
@@ -20,6 +20,11 @@ def GetLo32XForm : SDNodeXForm<imm, [{
return getI32Imm((unsigned)N->getZExtValue());
}]>;
+def GetLo8XForm : SDNodeXForm<imm, [{
+ // Transformation function: get the low 8 bits.
+ return getI8Imm((uint8_t)N->getZExtValue());
+}]>;
+
//===----------------------------------------------------------------------===//
// Random Pseudo Instructions.
@@ -1106,9 +1111,19 @@ def : Pat<(add GR64:$src1, 0x0000000080000000),
def : Pat<(store (add (loadi64 addr:$dst), 0x00000000800000000), addr:$dst),
(SUB64mi32 addr:$dst, 0xffffffff80000000)>;
-// Use a 32-bit and with implicit zero-extension instead of a 64-bit and if it
-// has an immediate with at least 32 bits of leading zeros, to avoid needing to
-// materialize that immediate in a register first.
+// To avoid needing to materialize an immediate in a register, use a 32-bit and
+// with implicit zero-extension instead of a 64-bit and if the immediate has at
+// least 32 bits of leading zeros. If in addition the last 32 bits can be
+// represented with a sign extension of a 8 bit constant, use that.
+
+def : Pat<(and GR64:$src, i64immZExt32SExt8:$imm),
+ (SUBREG_TO_REG
+ (i64 0),
+ (AND32ri8
+ (EXTRACT_SUBREG GR64:$src, sub_32bit),
+ (i32 (GetLo8XForm imm:$imm))),
+ sub_32bit)>;
+
def : Pat<(and GR64:$src, i64immZExt32:$imm),
(SUBREG_TO_REG
(i64 0),