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| author | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2013-06-10 17:19:15 +0000 |
|---|---|---|
| committer | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2013-06-10 17:19:15 +0000 |
| commit | 7c6f90d486911076da01ec0f37af4760fdd7041f (patch) | |
| tree | 78dbf9712290912553f10b65745619d171d7d3a9 /lib/Target/X86/X86InstrExtension.td | |
| parent | b838f9fe619382b212f6055ad94a74ff36db9219 (diff) | |
| download | external_llvm-7c6f90d486911076da01ec0f37af4760fdd7041f.zip external_llvm-7c6f90d486911076da01ec0f37af4760fdd7041f.tar.gz external_llvm-7c6f90d486911076da01ec0f37af4760fdd7041f.tar.bz2 | |
[PowerPC] Support branch mnemonics with implied CR0
The extended branch mnemonics are supposed to use an implied CR0
if there is no explicit condition register specified. This patch
adds extra variants of the mnemonics to this effect.
Problem reported by Joerg Sonnenberger.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183686 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrExtension.td')
0 files changed, 0 insertions, 0 deletions